loadpatents
name:-0.033860921859741
name:-0.050139188766479
name:-0.0070149898529053
Lidow; Alexander Patent Filings

Lidow; Alexander

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lidow; Alexander.The latest application filed is for "integrated circuit with multiple gallium nitride transistor sets".

Company Profile
6.49.27
  • Lidow; Alexander - Marina Del Rey CA
  • Lidow; Alexander - Santa Monica CA
  • Lidow; Alexander - Marina Del Ray CA
  • Lidow; Alexander - Hermosa Beach CA US
  • Lidow; Alexander - Manhattan Beach CA
  • Lidow; Alexander - Manhatta CA
  • Lidow; Alexander - Manhattan CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Integrated circuit with multiple gallium nitride transistor sets
Grant 11,050,339 - Reusch , et al. June 29, 2
2021-06-29
Integrated Circuit With Multiple Gallium Nitride Transistor Sets
App 20200195122 - Reusch; David C. ;   et al.
2020-06-18
Integrated gallium nitride based DC-DC converter
Grant 10,601,300 - Reusch , et al.
2020-03-24
Semiconductor devices with back surface isolation
Grant 10,600,674 - Lidow , et al.
2020-03-24
Semiconductor Devices With Back Surface Isolation
App 20190252238 - Lidow; Alexander ;   et al.
2019-08-15
Gate with self-aligned ledge for enhancement mode GaN transistors
Grant 10,312,335 - Cao , et al.
2019-06-04
Semiconductor devices with back surface isolation
Grant 10,312,131 - Lidow , et al.
2019-06-04
GaN transistors with polysilicon layers used for creating additional components
Grant 10,312,260 - Cao , et al.
2019-06-04
Integrated Gallium Nitride Based Dc-dc Converter
App 20180337588 - Reusch; David C. ;   et al.
2018-11-22
GaN transistors with polysilicon layers used for creating additional components
Grant 9,837,438 - Cao , et al. December 5, 2
2017-12-05
GaN TRANSISTORS WITH POLYSILICON LAYERS USED FOR CREATING ADDITIONAL COMPONENTS
App 20170330898 - Cao; Jianjun ;   et al.
2017-11-16
GATE WITH SELF-ALIGNED LEDGE FOR ENHANCEMENT MODE GaN TRANSISTORS
App 20170317179 - Cao; Jianjun ;   et al.
2017-11-02
Gate with self-aligned ledged for enhancement mode GaN transistors
Grant 9,748,347 - Cao , et al. August 29, 2
2017-08-29
Semiconductor Devices With Back Surface Isolation
App 20170162429 - Lidow; Alexander ;   et al.
2017-06-08
Semiconductor devices with back surface isolation
Grant 9,607,876 - Lidow , et al. March 28, 2
2017-03-28
Integrated circuit with matching threshold voltages and method for making same
Grant 9,583,480 - Cao , et al. February 28, 2
2017-02-28
GATE WITH SELF-ALIGNED LEDGED FOR ENHANCEMENT MODE GaN TRANSISTORS
App 20170047414 - Cao; Jianjun ;   et al.
2017-02-16
GaN device with reduced output capacitance and process for making same
Grant 9,331,191 - Colino , et al. May 3, 2
2016-05-03
Integrated Circuit With Matching Threshold Voltages And Method For Making Same
App 20160111416 - Cao; Jianjun ;   et al.
2016-04-21
Gan Transistors With Polysilicon Layers Used For Creating Additional Components
App 20160086980 - Cao; Jianjun ;   et al.
2016-03-24
GATE WITH SELF-ALIGNED LEDGED FOR ENHANCEMENT MODE GaN TRANSISTORS
App 20160035847 - Cao; Jianjun ;   et al.
2016-02-04
Integrated circuit with matching threshold voltages and method for making same
Grant 9,214,399 - Cao , et al. December 15, 2
2015-12-15
Method to fabricate self-aligned isolation in gallium nitride devices and integrated circuits
Grant 9,214,528 - Zhou , et al. December 15, 2
2015-12-15
GaN transistors with polysilicon layers for creating additional components
Grant 9,214,461 - Cao , et al. December 15, 2
2015-12-15
Isolation structure in gallium nitride devices and integrated circuits
Grant 9,171,911 - Zhou , et al. October 27, 2
2015-10-27
Enhancement mode gallium nitride transistor with improved gate characteristics
Grant 8,969,918 - Lidow , et al. March 3, 2
2015-03-03
Integrated Circuit With Matching Threshold Voltages And Method For Making Same
App 20150034962 - Cao; Jianjun ;   et al.
2015-02-05
GaN TRANSISTORS WITH POLYSILICON LAYERS FOR CREATING ADDITIONAL COMPONENTS
App 20150028384 - Cao; Jianjun ;   et al.
2015-01-29
Isolation Structure In Gallium Nitride Devices And Integrated Circuits
App 20150008442 - Zhou; Chunhua ;   et al.
2015-01-08
Method To Fabricate Self-aligned Isolation In Gallium Nitride Devices And Integrated Circuits
App 20150011057 - Zhou; Chunhua ;   et al.
2015-01-08
Enhancement mode GaN HEMT device
Grant 8,890,168 - Lidow , et al. November 18, 2
2014-11-18
Ion implanted and self aligned gate structure for GaN transistors
Grant 8,853,749 - Lidow , et al. October 7, 2
2014-10-07
Enhancement mode GaN HEMT device with gate spacer and method for fabricating the same
Grant 8,823,012 - Lidow , et al. September 2, 2
2014-09-02
Bumped, self-isolated GaN transistor chip with electrically isolated back surface
Grant 8,785,974 - Lidow , et al. July 22, 2
2014-07-22
ENHANCEMENT MODE GaN HEMT DEVICE
App 20130234153 - Lidow; Alexander ;   et al.
2013-09-12
Back diffusion suppression structures
Grant 8,436,398 - Lidow , et al. May 7, 2
2013-05-07
Enhancement mode GaN HEMT device and method for fabricating the same
Grant 8,404,508 - Lidow , et al. March 26, 2
2013-03-26
Hybrid semiconductor device having a GaN transistor and a silicon MOSFET
Grant 8,368,120 - Lidow , et al. February 5, 2
2013-02-05
Compensated gate MISFET and method for fabricating the same
Grant 8,350,294 - Lidow , et al. January 8, 2
2013-01-08
ION IMPLANTED AND SELF ALIGNED GATE STRUCTURE FOR GaN TRANSISTORS
App 20120193688 - Lidow; Alexander ;   et al.
2012-08-02
ENHANCEMENT MODE GaN HEMT DEVICE WITH GATE SPACER AND METHOD FOR FABRICATING THE SAME
App 20120175631 - Lidow; Alexander ;   et al.
2012-07-12
Semiconductor Devices With Back Surface Isolation
App 20120153300 - Lidow; Alexander ;   et al.
2012-06-21
Hybrid Semiconductor Device Having a GaN Transistor and a Silicon MOSFET
App 20120043553 - Lidow; Alexander ;   et al.
2012-02-23
Via Structure Of A Semiconductor Device And Method For Fabricating The Same
App 20110248283 - Cao; Jianjun ;   et al.
2011-10-13
Hybrid semiconductor device
Grant 8,017,978 - Lidow , et al. September 13, 2
2011-09-13
Ultra thin FET
Grant 7,955,969 - Kinzer , et al. June 7, 2
2011-06-07
BUMPED, SELF-ISOLATED GaN TRANSISTOR CHIP WITH ELECTRICALLY ISOLATED BACK SURFACE
App 20100258844 - Lidow; Alexander ;   et al.
2010-10-14
Back Diffusion Suppression Structures
App 20100258841 - Lidow; Alexander ;   et al.
2010-10-14
Enhancement Mode Gallium Nitride Transistor With Improved Gate Characteristics
App 20100258842 - Lidow; Alexander ;   et al.
2010-10-14
Compensated Gate Misfet And Method For Fabricating The Same
App 20100258848 - Lidow; Alexander ;   et al.
2010-10-14
ENHANCEMENT MODE GaN HEMT DEVICE AND METHOD FOR FABRICATING THE SAME
App 20100258843 - Lidow; Alexander ;   et al.
2010-10-14
Hybrid semiconductor device
App 20070210333 - Lidow; Alexander ;   et al.
2007-09-13
Ultra Thin Fet
App 20070082480 - Kinzer; Daniel M. ;   et al.
2007-04-12
High power MOSFET with low on-resistance and high breakdown voltage
Grant 5,742,087 - Lidow , et al. April 21, 1
1998-04-21
High power MOSFET with low on-resistance and high breakdown voltage
Grant 5,598,018 - Lidow , et al. January 28, 1
1997-01-28
High power MOSFET with low on-resistance and high breakdown voltage
Grant 5,338,961 - Lidow , et al. * August 16, 1
1994-08-16
High power MOSFET with low on-resistance and high breakdown voltage
Grant 5,191,396 - Lidow , et al. March 2, 1
1993-03-02
Plural polygon source pattern for MOSFET
Grant 5,008,725 - Lidow , et al. April 16, 1
1991-04-16
High power MOSFET with low on-resistance and high breakdown voltage
Grant 4,959,699 - Lidow , et al. September 25, 1
1990-09-25
High power MOSFET with direct connection from connection pads to underlying silicon
Grant 4,789,882 - Lidow December 6, 1
1988-12-06
High power MOSFET with low on-resistance and high breakdown voltage
Grant 4,705,759 - Lidow , et al. November 10, 1
1987-11-10
Process for manufacture of high power MOSFET with laterally distributed high carrier density beneath the gate oxide
Grant 4,680,853 - Lidow , et al. July 21, 1
1987-07-21
High power MOSFET with low on-resistance and high breakdown voltage
Grant 4,642,666 - Lidow , et al. February 10, 1
1987-02-10
Process for manufacture of high power MOSFET with laterally distributed high carrier density beneath the gate oxide
Grant 4,593,302 - Lidow , et al. June 3, 1
1986-06-03
Method of manufacture of high speed, high power bipolar transistor
Grant 4,416,708 - Abdoulin , et al. November 22, 1
1983-11-22
Planar structure for high voltage semiconductor devices with gaps in glassy layer over high field regions
Grant 4,412,242 - Herman , et al. October 25, 1
1983-10-25
Composite metal and polysilicon field plate structure for high voltage semiconductor devices
Grant 4,399,449 - Herman , et al. August 16, 1
1983-08-16
High power MOSFET with low on-resistance and high breakdown voltage
Grant 4,376,286 - Lidow , et al. March 8, 1
1983-03-08
Company Registrations
SEC0001242599LIDOW ALEXANDER

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