loadpatents
name:-0.015341997146606
name:-0.0068140029907227
name:-0.0031509399414062
Liao; Jeng-Hwa Patent Filings

Liao; Jeng-Hwa

Patent Applications and Registrations

Patent applications and USPTO patent grants for Liao; Jeng-Hwa.The latest application filed is for "semiconductor memory device and method of manufacturing the same".

Company Profile
2.6.14
  • Liao; Jeng-Hwa - Hsinchu TW
  • Liao; Jeng-Hwa - Hsinchu City TW
  • Liao; Jeng-Hwa - Hsin chu N/A TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor memory device and method of manufacturing the same
Grant 10,354,924 - Liao , et al. July 16, 2
2019-07-16
Semiconductor Memory Device And Method Of Manufacturing The Same
App 20190067119 - Liao; Jeng-Hwa ;   et al.
2019-02-28
Memory Device And Method For Fabricating The Same
App 20170069762 - Liao; Jeng-Hwa ;   et al.
2017-03-09
Methods for fabricating semiconductor device
Grant 9,236,497 - Liao , et al. January 12, 2
2016-01-12
Method For Reducing Defects In Polysilicon Layers
App 20150340236 - Liao; Jeng Hwa ;   et al.
2015-11-26
Methods For Fabricating Semiconductor Device
App 20150171223 - Liao; Jeng-Hwa ;   et al.
2015-06-18
Semiconductor device and methods of manufacturing
Grant 8,969,946 - Jhang , et al. March 3, 2
2015-03-03
Semiconductor Device And Methods Of Manufacturing
App 20140264544 - Jhang; Pei-Ci ;   et al.
2014-09-18
Method for reducing wordline bridge rate
Grant 8,791,022 - Liao , et al. July 29, 2
2014-07-29
Semiconductor Structure For Improved Oxide Fill In
App 20140117356 - Liao; Jeng Hwa ;   et al.
2014-05-01
Gate Structure And Method Of Manufacturing Thereof
App 20140048866 - Liao; Jeng Hwa ;   et al.
2014-02-20
Method For Fabricating A Semiconductor Device With Increased Reliability
App 20130168754 - Liao; Jeng Hwa ;   et al.
2013-07-04
Method For Reducing Wordline Bridge Rate
App 20120129350 - Liao; Jeng-Hwa ;   et al.
2012-05-24
Charge trapping memory cell having bandgap engineered tunneling structure with oxynitride isolation layer
Grant 8,169,835 - Liao , et al. May 1, 2
2012-05-01
Charge Trapping Memory Cell Having Bandgap Engineered Tunneling Structure With Oxynitride Isolation Layer
App 20110075486 - Liao; Jeng-Hwa ;   et al.
2011-03-31
Method For Fabricating Non-volatile Memory
App 20100210085 - Liao; Jeng-Hwa ;   et al.
2010-08-19
Methods For Fabricating Dielectric Layer And Non-volatile Memory
App 20100178758 - Liao; Jeng-Hwa ;   et al.
2010-07-15

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed