Liang; Ming-Chung
Patent Applications and Registrations
Patent applications and USPTO patent grants for Liang; Ming-Chung.The latest application filed is for "semiconductor device with self-aligned vias".
Company Profile
9.48.55
- Liang; Ming-Chung - Hsinchu TW
- Liang; Ming-Chung - Hsin-Chu TW
- Liang; Ming-Chung - Hsin-Chu City TW
- - Hsinchu TW
- LIANG; Ming-Chung - Hsinchu City TW
- Liang; Ming-Chung - Taipei TW
- Liang; Ming-Chung - Ping-Tung TW
- Liang; Ming-Chung - Pingtung TW
- Liang, Ming-Chung - Taipei City TW
Patent Activity
| Patent | Date |
|---|---|
| Semiconductor Device With Self-aligned Vias App 20220285216 - Chen; Chien-Han ; et al. | 2022-09-08 |
| Interconnect Structure with Vias Extending Through Multiple Dielectric Layers App 20220173042 - Ho; Chun-Te ; et al. | 2022-06-02 |
| Semiconductor device with self-aligned vias Grant 11,342,224 - Chen , et al. May 24, 2 | 2022-05-24 |
| Interconnect structure with vias extending through multiple dielectric layers Grant 11,251,127 - Ho , et al. February 15, 2 | 2022-02-15 |
| Cut last self-aligned litho-etch patterning Grant 11,037,789 - Huang , et al. June 15, 2 | 2021-06-15 |
| Curing photo resist for improving etching selectivity Grant 11,018,021 - Hsieh , et al. May 25, 2 | 2021-05-25 |
| Semiconductor Device With Self-aligned Vias App 20200135562 - Chen; Chien-Han ; et al. | 2020-04-30 |
| Interconnect Structure and Method App 20200126915 - Ho; Chun-Te ; et al. | 2020-04-23 |
| Cut Last Self-aligned Litho-etch Patterning App 20200111670 - Huang; Kuan-Wei ; et al. | 2020-04-09 |
| Cut last self-aligned litho-etch patterning Grant 10,553,431 - Huang , et al. Fe | 2020-02-04 |
| Interconnect structure and method Grant 10,522,468 - Ho , et al. Dec | 2019-12-31 |
| Curing Photo Resist for Improving Etching Selectivity App 20190333777 - Hsieh; Wen-Kuo ; et al. | 2019-10-31 |
| Curing photo resist for improving etching selectivity Grant 10,347,505 - Hsieh , et al. July 9, 2 | 2019-07-09 |
| Integrated circuit fabrication with a passivation agent Grant 10,290,535 - Ho , et al. | 2019-05-14 |
| Interconnect structure and method of forming the same Grant 10,269,700 - Chiu , et al. | 2019-04-23 |
| Self-aligned double patterning Grant 10,256,096 - Huang , et al. | 2019-04-09 |
| Cut First Self-aligned Litho-etch Patterning App 20190051523 - Huang; Kuan-Wei ; et al. | 2019-02-14 |
| Interconnect Structure and Method App 20190035734 - Ho; Chun-Te ; et al. | 2019-01-31 |
| Method for manufacturing a semiconductor device Grant 10,157,775 - Chen , et al. Dec | 2018-12-18 |
| Cut first self-aligned litho-etch patterning Grant 10,109,486 - Huang , et al. October 23, 2 | 2018-10-23 |
| Method For Manufacturing A Semiconductor Device App 20180294185 - CHEN; Chih-Hao ; et al. | 2018-10-11 |
| Semiconductor device and method of forming same Grant 10,090,167 - Chiu , et al. October 2, 2 | 2018-10-02 |
| Interconnect Structure and Method of Forming the Same App 20180182703 - Chiu; Chien-Chih ; et al. | 2018-06-28 |
| Methods of forming an interconnect structure Grant 9,953,863 - Ho , et al. April 24, 2 | 2018-04-24 |
| Methods Of Forming An Interconnect Structure App 20180102279 - Ho; Chun-Te ; et al. | 2018-04-12 |
| Interconnect structure and method of forming the same Grant 9,917,048 - Chiu , et al. March 13, 2 | 2018-03-13 |
| Cut Last Self-aligned Litho-etch Patterning App 20170365472 - Huang; Kuan-Wei ; et al. | 2017-12-21 |
| Cut First Self-aligned Litho-etch Patterning App 20170294311 - Huang; Kuan-Wei ; et al. | 2017-10-12 |
| Cut last self-aligned litho-etch patterning Grant 9,761,451 - Huang , et al. September 12, 2 | 2017-09-12 |
| Method for forming conducting via and damascene structure Grant 9,728,445 - Hsieh , et al. August 8, 2 | 2017-08-08 |
| Cut first self-aligned litho-etch patterning Grant 9,698,016 - Huang , et al. July 4, 2 | 2017-07-04 |
| Method and apparatus of forming a via Grant 9,496,217 - Tsai , et al. November 15, 2 | 2016-11-15 |
| Cut First Self-aligned Litho-etch Patterning App 20160314972 - Huang; Kuan-Wei ; et al. | 2016-10-27 |
| Cut Last Self-aligned Litho-etch Patterning App 20160276154 - Huang; Kuan-Wei ; et al. | 2016-09-22 |
| Cut first self-aligned litho-etch patterning Grant 9,425,049 - Huang , et al. August 23, 2 | 2016-08-23 |
| Self-aligned double patterning Grant 9,406,511 - Huang , et al. August 2, 2 | 2016-08-02 |
| Curing Photo Resist for Improving Etching Selectivity App 20160218016 - Hsieh; Wen-Kuo ; et al. | 2016-07-28 |
| Cut last self-aligned litho-etch patterning Grant 9,368,349 - Huang , et al. June 14, 2 | 2016-06-14 |
| Semiconductor Device and Method of Forming Same App 20160111324 - Chiu; Chien-Chih ; et al. | 2016-04-21 |
| Curing photo resist for improving etching selectivity Grant 9,305,839 - Hsieh , et al. April 5, 2 | 2016-04-05 |
| Reduction of OCD measurement noise by way of metal via slots Grant 9,252,060 - Tsai , et al. February 2, 2 | 2016-02-02 |
| Self-Aligned Double Patterning App 20160020100 - Huang; Kuan-Wei ; et al. | 2016-01-21 |
| Self-Aligned Double Patterning App 20160013103 - Huang; Kuan-Wei ; et al. | 2016-01-14 |
| Interconnect Structure and Method of Forming the Same App 20160005689 - Chiu; Chien-Chih ; et al. | 2016-01-07 |
| Interconnect Structure And Method Of Forming The Same App 20150294937 - Chiu; Chien-Chih ; et al. | 2015-10-15 |
| Interconnect structure and method of forming the same Grant 9,142,453 - Chiu , et al. September 22, 2 | 2015-09-22 |
| Organosilicate polymer mandrel for self-aligned double patterning process Grant 9,123,656 - Hsieh , et al. September 1, 2 | 2015-09-01 |
| Method For Forming Conducting Via And Damascene Structure App 20150206792 - HSIEH; Wen-Kuo ; et al. | 2015-07-23 |
| Cut Last Self-aligned Litho-etch Patterning App 20150200096 - Huang; Kuan-Wei ; et al. | 2015-07-16 |
| Cut First Self-aligned Litho-etch Patterning App 20150200095 - Huang; Kuan-Wei ; et al. | 2015-07-16 |
| Curing Photo Resist for Improving Etching Selectivity App 20150179511 - Hsieh; Wen-Kuo ; et al. | 2015-06-25 |
| Method of forming via holes Grant 8,895,445 - Hsieh , et al. November 25, 2 | 2014-11-25 |
| Integrated circuits and methods for forming the integrated circuits Grant 08617986 - | 2013-12-31 |
| Integrated circuits and methods for forming the integrated circuits Grant 8,617,986 - Liang , et al. December 31, 2 | 2013-12-31 |
| Reduction Of Ocd Measurement Noise By Way Of Metal Via Slots App 20130256659 - Tsai; Chi-Ming ; et al. | 2013-10-03 |
| Method for fabricating low-k dielectric and Cu interconnect Grant 8,354,346 - Chen , et al. January 15, 2 | 2013-01-15 |
| Double patterning strategy for contact hole and trench in photolithography Grant 8,222,151 - Liang , et al. July 17, 2 | 2012-07-17 |
| Method Of Forming Via Holes App 20120149204 - HSIEH; Wen-Kuo ; et al. | 2012-06-14 |
| Double Patterning Strategy For Contact Hole And Trench In Photolithography App 20110275218 - LIANG; Ming-Chung ; et al. | 2011-11-10 |
| Method for Fabricating Low-k Dielectric and Cu Interconnect App 20110263127 - Chen; Chih-Hao ; et al. | 2011-10-27 |
| Double patterning strategy for contact hole and trench in photolithography Grant 8,008,206 - Liang , et al. August 30, 2 | 2011-08-30 |
| Method for fabricating low-k dielectric and Cu interconnect Grant 7,998,873 - Chen , et al. August 16, 2 | 2011-08-16 |
| Integrated Circuits And Methods For Forming The Integrated Circuits App 20110108994 - LIANG; Ming-Chung ; et al. | 2011-05-12 |
| Double Patterning Strategy For Contact Hole And Trench In Photolithography App 20110070738 - LIANG; Ming-Chung ; et al. | 2011-03-24 |
| Method And Apparatus Of Forming A Via App 20100308469 - Tsai; Hsin-Yi ; et al. | 2010-12-09 |
| Metal interconnect structure and process for forming same Grant 7,670,947 - Wu , et al. March 2, 2 | 2010-03-02 |
| Method for Fabricating Low-k Dielectric and Cu Interconnect App 20080311756 - Chen; Chih-Hao ; et al. | 2008-12-18 |
| Metal interconnect structure and process for forming same App 20080171442 - Wu; Tsang-Jiuh ; et al. | 2008-07-17 |
| Method for reducing dimensions between patterns on a hardmask Grant 7,361,604 - Chung , et al. April 22, 2 | 2008-04-22 |
| Method for reducing dimensions between patterns on a photoresist Grant 7,303,995 - Chung , et al. December 4, 2 | 2007-12-04 |
| Method of reducing pattern pitch in integrated circuits Grant 7,105,099 - Chung , et al. September 12, 2 | 2006-09-12 |
| Three-dimensional Memory Structure And Manufacturing Method Thereof App 20060197180 - Lai; Erh-Kun ; et al. | 2006-09-07 |
| Method for reducing dimensions between patterns on a photoresist Grant 7,033,948 - Chung , et al. April 25, 2 | 2006-04-25 |
| Three-dimensional memory structure and manufacturing method thereof Grant 7,030,459 - Lai , et al. April 18, 2 | 2006-04-18 |
| [method Of Reducing Pattern Pitch In Integrated Circuits] App 20060011575 - Chung; Henry ; et al. | 2006-01-19 |
| Three-dimensional Memory Structure And Manufacturing Method Thereof App 20050133883 - Lai, Erh-Kun ; et al. | 2005-06-23 |
| [three-dimensional Memory Structure And Manufacturing Method Thereof] App 20050006719 - Lai, Erh-Kun ; et al. | 2005-01-13 |
| Method for fluorocarbon film depositing App 20040161946 - Tsai, Hsin-Yi ; et al. | 2004-08-19 |
| Method for reducing pitch Grant 6,774,051 - Chung , et al. August 10, 2 | 2004-08-10 |
| Method for reducing dimensions between patterns on a photoresist App 20040132225 - Chung, Henry Wei-Ming ; et al. | 2004-07-08 |
| Method for reducing dimensions between patterns on a photoresist Grant 6,750,150 - Chung , et al. June 15, 2 | 2004-06-15 |
| Method of forming a fluorocarbon polymer film on a substrate using a passivation layer Grant 6,746,970 - Liang , et al. June 8, 2 | 2004-06-08 |
| Method of forming a fluorocarbon polymer film on a substrate using a passivation layer App 20030234440 - Liang, Ming-Chung ; et al. | 2003-12-25 |
| Method for eliminating standing waves in a photoresist profile App 20030235998 - Liang, Ming-Chung | 2003-12-25 |
| Method for reducing pitch App 20030232509 - Chung, Chia-Chi ; et al. | 2003-12-18 |
| Method for reducing dimensions between patterns on a photomask App 20030224254 - Chung, Henry Wei-Ming ; et al. | 2003-12-04 |
| Method for reducing dimensions between patterns on a hardmask App 20030224602 - Chung, Henry Wei-Ming ; et al. | 2003-12-04 |
| Method for reducing dimensions between patterns on a photoresist App 20030216051 - Chung, Henry Wei-Ming ; et al. | 2003-11-20 |
| Operating method of a semiconductor etcher Grant 6,635,579 - Liang , et al. October 21, 2 | 2003-10-21 |
| Utilizing chemical dry etching for forming rounded corner in shallow trench isolation process App 20030186555 - Liang, Ming-Chung ; et al. | 2003-10-02 |
| Apparatus for cleaning a wafer with shearing stress from slab with curved portion Grant 6,601,596 - Liang , et al. August 5, 2 | 2003-08-05 |
| Method for reducing dimensions between patterns on a photoresist App 20030082916 - Chung, Henry Wei-Ming ; et al. | 2003-05-01 |
| Dry etching method for manufacturing processes of semiconductor devices App 20030068898 - Lee, Chun-Hung ; et al. | 2003-04-10 |
| Plasma etching gas App 20030017708 - Liang, Ming-Chung | 2003-01-23 |
| Chamber conditioning method App 20030008503 - Tsai, Shin-Yi ; et al. | 2003-01-09 |
| Inspection method to check contact hole open after contact etching App 20020134935 - Liang, Ming-Chung ; et al. | 2002-09-26 |
| Apparatus for cleaning a wafer App 20020134411 - Liang, Ming-Chung ; et al. | 2002-09-26 |
| Vertical batch type wafer cleaning apparatus App 20020117192 - Liang, Ming-Chung | 2002-08-29 |
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