Li; Yongna

Patent Applications and Registrations

Patent applications and USPTO patent grants for Li; Yongna.The latest application filed is for "interconnect structure of three-dimensional memory device".

Company Profile

13.8.10

Li; Yongna - Hubei CN
Li; Yongna - Wuhan CN
Li; Yongna - Cupertino CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Structure and method for testing three-dimensional memory device Grant 10,998,079 - Kim , et al. May 4, 2	2021-05-04
Interconnect structure of three-dimensional memory device Grant 10,930,663 - Lu , et al. February 23, 2	2021-02-23
Interconnect Structure Of Three-dimensional Memory Device App 20210043643 - LU; Zhenyu ; et al.	2021-02-11
Three-dimensional Memory Devices And Fabricating Methods Thereof App 20200411547 - LU; Zhenyu ; et al.	2020-12-31
Interconnect structure of three-dimensional memory device Grant 10,847,531 - Lu , et al. November 24, 2	2020-11-24
Three-dimensional memory devices and fabricating methods thereof Grant 10,804,287 - Lu , et al. October 13, 2	2020-10-13
Structure And Method For Testing Three-dimensional Memory Device App 20200265913 - KIM; Jong Jun ; et al.	2020-08-20
Staircase Etch Control In Forming Three-dimensional Memory Device App 20200203285 - LU; Zhenyu ; et al.	2020-06-25
Structure and method for testing three-dimensional memory device Grant 10,679,721 - Kim , et al.	2020-06-09
Three dimensional storage cell array with highly dense and scalable word line design approach Grant 10,593,624 - Thimmegowda , et al.	2020-03-17
Staircase etch control in forming three-dimensional memory device Grant 10,522,474 - Lu , et al. Dec	2019-12-31
Three-dimensional Memory Devices And Fabricating Methods Thereof App 20190074291 - Lu; Zhenyu ; et al.	2019-03-07
Interconnect Structure Of Three-dimensional Memory Device App 20190067314 - Lu; Zhenyu ; et al.	2019-02-28
Structure And Method For Testing Three-dimensional Memory Device App 20190057756 - Kim; Jong Jun ; et al.	2019-02-21
Staircase Etch Control In Forming Three-dimensional Memory Device App 20190051610 - LU; Zhenyu ; et al.	2019-02-14
Three Dimensional Storage Cell Array With Highly Dense And Scalable Word Line Design Approach App 20180331034 - THIMMEGOWDA; Deepak ; et al.	2018-11-15
Three dimensional storage cell array with highly dense and scalable word line design approach Grant 10,043,751 - Thimmegowda , et al. August 7, 2	2018-08-07
Three Dimensional Storage Cell Array With Highly Dense And Scalable Word Line Design Approach App 20170287833 - THIMMEGOWDA; Deepak ; et al.	2017-10-05

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