Li; Po-Hsueh
Patent Applications and Registrations
Patent applications and USPTO patent grants for Li; Po-Hsueh.The latest application filed is for "method for integrated circuit patterning".
- Li; Po-Hsueh - Taichung TW
- Li; Po-Hsueh - Taichung City TW
| Patent | Date |
|---|---|
| Method for integrated circuit patterning Grant 10,727,061 - Yang , et al. | 2020-07-28 |
| Semiconductor device having two spacers Grant 10,269,906 - Li | 2019-04-23 |
| Semiconductor device and a method for fabricating the same Grant 10,163,718 - Li , et al. Dec | 2018-12-25 |
| Method for Integrated Circuit Patterning App 20180233368 - Yang; Tsung-Lin ; et al. | 2018-08-16 |
| Semiconductor Device And Manufacturing Method Thereof App 20180151678 - Li; Po-Hsueh | 2018-05-31 |
| Method for integrated circuit patterning Grant 9,941,125 - Yang , et al. April 10, 2 | 2018-04-10 |
| Semiconductor Device And A Method For Fabricating The Same App 20180012806 - LI; Po-Hsueh ; et al. | 2018-01-11 |
| Semiconductor device and a method for fabricating the same Grant 9,779,997 - Li , et al. October 3, 2 | 2017-10-03 |
| Semiconductor Device And A Method For Fabricating The Same App 20170194209 - LI; Po-Hsueh ; et al. | 2017-07-06 |
| Method for Integrated Circuit Patterning App 20170062222 - Yang; Tsung-Lin ; et al. | 2017-03-02 |
| Gate spacers and methods of forming same Grant 9,536,980 - Huang , et al. January 3, 2 | 2017-01-03 |
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