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Techniques for mapping logical threads to physical threads in a simultaneous multithreading data processing system
Grant 9,715,411 - Doing , et al. July 25, 2 | 2017-07-25 |
Techniques for selecting a predicted indirect branch address from global and local caches
Grant 9,442,736 - Eickemeyer , et al. September 13, 2 | 2016-09-13 |
Techniques For Mapping Logical Threads To Physical Threads In A Simultaneous Multithreading Data Processing System
App 20150220366 - Doing; Richard William ; et al. | 2015-08-06 |
Techinques for selecting a predicted indirect branch address from global and local caches
App 20150046690 - Eickemeyer; Richard James ; et al. | 2015-02-12 |
Storing branch information in an address table of a processor
Grant 8,943,301 - Konigsburg , et al. January 27, 2 | 2015-01-27 |
Method and apparatus to implement software to hardware thread priority
Grant 8,635,621 - Levitan , et al. January 21, 2 | 2014-01-21 |
Storing Branch Information in an Address Table of a Processor
App 20110213951 - Konigsburg; Brian R. ; et al. | 2011-09-01 |
Storing branch information in an address table of a processor
Grant 7,984,280 - Konigsburg , et al. July 19, 2 | 2011-07-19 |
Method and logical apparatus for managing processing system resource use for speculative execution
Grant 7,890,738 - Eisen , et al. February 15, 2 | 2011-02-15 |
Method And Apparatus To Implement Software To Hardware Thread Priority
App 20100050178 - Levitan; David Stephen ; et al. | 2010-02-25 |
Branch encoding before instruction cache write
Grant 7,487,334 - Konigsburg , et al. February 3, 2 | 2009-02-03 |
Fetch-side instruction dispatch group formation
Grant 7,475,223 - Konigsburg , et al. January 6, 2 | 2009-01-06 |
Methods For Storing Branch Information In An Address Table Of A Processor
App 20080276080 - Konigsburg; Brian R. ; et al. | 2008-11-06 |
Apparatus and Computer Program Product for Testing Ability to Recover From Cache Directory Errors
App 20080235531 - Levitan; David Stephen | 2008-09-25 |
Methods and systems for storing branch information in an address table of a processor
Grant 7,426,631 - Konigsburg , et al. September 16, 2 | 2008-09-16 |
Method for testing ability to recover from cache directory errors
Grant 7,412,620 - Levitan August 12, 2 | 2008-08-12 |
Instruction grouping history on fetch-side dispatch group formation
Grant 7,269,715 - Le , et al. September 11, 2 | 2007-09-11 |
Fencing off instruction buffer until re-circulation of rejected preceding and branch instructions to avoid mispredict flush
Grant 7,254,700 - Levitan , et al. August 7, 2 | 2007-08-07 |
Method, apparatus, and computer program product for testing ability to recover from cache directory errors
App 20070011599 - Levitan; David Stephen | 2007-01-11 |
Thread-specific branch prediction by logically splitting branch history tables and predicted target address cache in a simultaneous multithreading processing environment
Grant 7,120,784 - Alexander , et al. October 10, 2 | 2006-10-10 |
Systems and methods for branch target fencing
App 20060184778 - Levitan; David Stephen ; et al. | 2006-08-17 |
Methods and systems for storing branch information in an address table of a processor
App 20060174096 - Konigsburg; Brian R. ; et al. | 2006-08-03 |
Branch encoding before instruction cache write
App 20060174095 - Konigsburg; Brian R. ; et al. | 2006-08-03 |
Instruction grouping history on fetch-side dispatch group formation
App 20060174091 - Le; Hung Qui ; et al. | 2006-08-03 |
Fetch-side instruction dispatch group formation
App 20060174092 - Konigsburg; Brian R. ; et al. | 2006-08-03 |
Method and logical apparatus for managing processing system resource use for speculative execution
App 20060161762 - Eisen; Lee Evan ; et al. | 2006-07-20 |
Cache predictor for simultaneous multi-threaded processor system supporting multiple transactions
Grant 7,039,768 - Alexander , et al. May 2, 2 | 2006-05-02 |
Simultaneous multithread processor with result data delay path to adjust pipeline length for input to respective thread
Grant 7,000,233 - Levitan , et al. February 14, 2 | 2006-02-14 |
Split branch history tables and count cache for simultaneous multithreading
App 20040215720 - Alexander, Gregory William ; et al. | 2004-10-28 |
Cache predictor for simultaneous multi-threaded processor system supporting multiple translations
App 20040215882 - Alexander, Gregory William ; et al. | 2004-10-28 |
Method and circuit for modifying pipeline length in a simultaneous multithread processor
App 20040210742 - Levitan, David Stephen ; et al. | 2004-10-21 |
Method and system for software control of hardware branch prediction mechanism in a data processor
Grant 6,662,360 - Hay , et al. December 9, 2 | 2003-12-09 |
Recursively accessing a branch target address cache using a target address previously accessed from the branch target address cache
Grant 6,651,162 - Levitan , et al. November 18, 2 | 2003-11-18 |
Apparatus and method for instruction fetching using a multi-port instruction cache directory
Grant 5,918,044 - Levitan , et al. June 29, 1 | 1999-06-29 |
Method and apparatus for managing register renaming including a wraparound array and an indication of rename entry ages
Grant 5,872,950 - Levitan , et al. February 16, 1 | 1999-02-16 |
Apparatus and method for performing branch target address calculation and branch prediciton in parallel in an information handling system
Grant 5,796,998 - Levitan , et al. August 18, 1 | 1998-08-18 |
Self-checking content-addressable memory and method of operation for detecting multiple selected word lines
Grant 5,796,758 - Levitan August 18, 1 | 1998-08-18 |
Method for updating a branch history table in a processor which resolves multiple branches in a single cycle
Grant 5,758,143 - Levitan May 26, 1 | 1998-05-26 |
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