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Selectively supporting static branch prediction settings only in association with processor-designated types of instructions
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Predicting indirect branches using problem branch filtering and pattern cache
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Operation of a multi-slice processor implementing tagged geometric history length (TAGE) branch prediction
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Selectively Supporting Static Branch Prediction Settings Only In Association With Processor-designated Types Of Instructions
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Instruction prefetching in a computer processor using a prefetch prediction vector
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Generating a mask vector for determining a processor instruction address using an instruction tag in a multi-slice processor
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Variable Latency Flush Filtering
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Techniques for predicting a target address of an indirect branch instruction
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Instruction Prefetching In A Computer Processor Using A Prefetch Prediction Vector
App 20190138312 - EICKEMEYER; RICHARD J. ; et al. | 2019-05-09 |
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Managing an effective address table in a multi-slice processor
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Instruction prefetching in a computer processor using a prefetch prediction vector
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Dynamic Sequential Instruction Prefetching
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Power Management Of Branch Predictors In A Computer Processor
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Techniques for dynamic sequential instruction prefetching
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Power management of branch predictors in a computer processor
Grant 10,037,207 - Levitan , et al. July 31, 2 | 2018-07-31 |
Power management of branch predictors in a computer processor
Grant 9,996,351 - Levitan , et al. June 12, 2 | 2018-06-12 |
Branch prediction using multiple versions of history data
Grant 9,983,878 - Levitan , et al. May 29, 2 | 2018-05-29 |
Branch prediction using multiple versions of history data
Grant 9,904,551 - Levitan , et al. February 27, 2 | 2018-02-27 |
Branch prediction using multiple versions of history data
Grant 9,898,295 - Levitan , et al. February 20, 2 | 2018-02-20 |
Administering Instruction Tags In A Computer Processor
App 20180004516 - FEISTE; KURT A. ; et al. | 2018-01-04 |
Identifying An Effective Address (ea) Using An Interrupt Instruction Tag (itag) In A Multi-slice Processor
App 20170344368 - LEVITAN; DAVID S. ; et al. | 2017-11-30 |
Power Management Of Branch Predictors In A Computer Processor
App 20170344377 - LEVITAN; DAVID S. ; et al. | 2017-11-30 |
Generating A Mask Vector For Determining A Processor Instruction Address Using An Instruction Tag In A Multi-slice Processor
App 20170344379 - Levitan; David S. ; et al. | 2017-11-30 |
Operation Of A Multi-slice Processor Implementing Tagged Geometric History Length Branch Prediction
App 20170344370 - LEVITAN; DAVID S. ; et al. | 2017-11-30 |
Power Management Of Branch Predictors In A Computer Processor
App 20170344372 - LEVITAN; DAVID S. ; et al. | 2017-11-30 |
Managing An Effective Address Table In A Multi-slice Processor
App 20170344378 - GIRI; AKASH V. ; et al. | 2017-11-30 |
Managing An Effective Address Table In A Multi-slice Processor
App 20170344469 - GIRI; AKASH V. ; et al. | 2017-11-30 |
Hazard Avoidance In A Multi-slice Processor
App 20170329607 - EICKEMEYER; RICHARD J. ; et al. | 2017-11-16 |
Techniques For Dynamic Sequential Instruction Prefetching
App 20170329608 - EICKEMEYER; RICHARD J. ; et al. | 2017-11-16 |
Hazard Avoidance In A Multi-slice Processor
App 20170329715 - EICKEMEYER; RICHARD J. ; et al. | 2017-11-16 |
Techniques For Predicting A Target Address Of An Indirect Branch Instruction
App 20170315810 - EICKEMEYER; RICHARD J. ; et al. | 2017-11-02 |
Techniques For Restoring Previous Values To Registers Of A Processor Register File
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Instruction Prefetching In A Computer Processor
App 20170269937 - EICKEMEYER; RICHARD J. ; et al. | 2017-09-21 |
Blocking Instruction Fetching In A Computer Processor
App 20170262286 - HICKERSON; BRYAN G. ; et al. | 2017-09-14 |
Branch Prediction In A Computer Processor
App 20170242701 - FLEISCHER; BRUCE M. ; et al. | 2017-08-24 |
Branch Prediction Using Multiple Versions Of History Data
App 20170046162 - Levitan; David S. ; et al. | 2017-02-16 |
Branch Prediction Using Multiple Versions Of History Data
App 20170046161 - Levitan; David S. ; et al. | 2017-02-16 |
Branch prediction using multiple versions of history data
Grant 9,495,164 - Levitan , et al. November 15, 2 | 2016-11-15 |
Compressed indirect prediction caches
Grant 9,483,271 - Karkhanis , et al. November 1, 2 | 2016-11-01 |
Branch Prediction Using Multiple Versions Of History Data
App 20160216972 - Levitan; David S. ; et al. | 2016-07-28 |
Predicting Indirect Branches Using Problem Branch Filtering And Pattern Cache
App 20150363201 - Eickemeyer; Richard J. ; et al. | 2015-12-17 |
Branch Prediction Using Multiple Versions Of History Data
App 20150331691 - Levitan; David S. ; et al. | 2015-11-19 |
Hardware-assisted program trace collection with selectable call-signature capture
Grant 9,189,365 - Frazier , et al. November 17, 2 | 2015-11-17 |
Identifying and tagging breakpoint instructions for facilitation of software debug
Grant 9,170,920 - Konigsburg , et al. October 27, 2 | 2015-10-27 |
Identifying and tagging breakpoint instructions for facilitation of software debug
Grant 9,081,895 - Konigsburg , et al. July 14, 2 | 2015-07-14 |
Compressed Indirect Prediction Caches
App 20150186145 - Karkhanis; Tejas ; et al. | 2015-07-02 |
Reducing store-hit-loads in an out-of-order processor
Grant 9,069,563 - Konigsburg , et al. June 30, 2 | 2015-06-30 |
Tracking Long Ghv In High Performance Out-of-order Superscalar Processors
App 20150032997 - Eickemeyer; Richard J. ; et al. | 2015-01-29 |
Operating a stack of information in an information handling system
Grant 8,943,299 - Ekanadham , et al. January 27, 2 | 2015-01-27 |
Task switch immunized performance monitoring
Grant 8,868,886 - Frazier , et al. October 21, 2 | 2014-10-21 |
Identifying And Tagging Breakpoint Instructions For Facilitation Of Software Debug
App 20140298106 - Konigsburg; Brian R. ; et al. | 2014-10-02 |
Identifying And Tagging Breakpoint Instructions For Facilitation Of Software Debug
App 20140298105 - Konigsburg; Brian R. ; et al. | 2014-10-02 |
Hardware-assisted Program Trace Collection With Selectable Call-signature Capture
App 20140059523 - Frazier; Giles R. ; et al. | 2014-02-27 |
Controlling power of a cache based on predicting the instruction cache way for high power applications
Grant 8,635,408 - Levenstein , et al. January 21, 2 | 2014-01-21 |
Reducing Store-hit-loads In An Out-of-order Processor
App 20130073833 - Konigsburg; Brian R. ; et al. | 2013-03-21 |
Hardware-assisted Program Trace Collection With Selectable Call-signature Capture
App 20130055033 - Frazier; Giles R. ; et al. | 2013-02-28 |
Saving power by powering down an instruction fetch array based on capacity history of instruction buffer
Grant 8,370,671 - Levitan February 5, 2 | 2013-02-05 |
Task Switch Immunized Performance Monitoring
App 20120254837 - FRAZIER; GILES R. ; et al. | 2012-10-04 |
Predicting the Instruction Cache Way for High Power Applications
App 20120173821 - Levenstein; Sheldon B. ; et al. | 2012-07-05 |
Tracking effective addresses in an out-of-order processor
Grant 8,131,976 - Doing , et al. March 6, 2 | 2012-03-06 |
Hardware Assist for Optimizing Code During Processing
App 20120005462 - Hall; Ronald P. ; et al. | 2012-01-05 |
Operating A Stack Of Information In An Information Handling System
App 20110314259 - Ekanadham; Kattamuri ; et al. | 2011-12-22 |
Branch target address cache with hashed indices
Grant 7,962,722 - Levenstein , et al. June 14, 2 | 2011-06-14 |
Saving Power by Powering Down an Instruction Fetch Array Based on Capacity History of Instruction Buffer
App 20110131438 - Levitan; David S. | 2011-06-02 |
Branch target address cache selectively applying a delayed hit
Grant 7,877,586 - Levitan , et al. January 25, 2 | 2011-01-25 |
Branch target address cache including address type tag bit
Grant 7,865,705 - Levitan , et al. January 4, 2 | 2011-01-04 |
Branch target address cache storing direct predictions
Grant 7,844,807 - Levitan , et al. November 30, 2 | 2010-11-30 |
Tracking Effective Addresses in an Out-of-Order Processor
App 20100262806 - Doing; Richard W. ; et al. | 2010-10-14 |
System and method for optimizing branch logic for handling hard to predict indirect branches
Grant 7,809,933 - Levitan , et al. October 5, 2 | 2010-10-05 |
Branch target address cache
Grant 7,783,870 - Levitan , et al. August 24, 2 | 2010-08-24 |
Branch prediction with partially folded global history vector for reduced XOR operation time
Grant 7,689,816 - Levitan March 30, 2 | 2010-03-30 |
Method And Apparatus For Optimized Method Of Bht Banking And Multiple Updates
App 20100031011 - Chen; Lei ; et al. | 2010-02-04 |
Apparatus and computer program product for testing ability to recover from cache directory errors
Grant 7,657,783 - Levitan February 2, 2 | 2010-02-02 |
Data Processing System, Processor And Method Of Data Processing Having Branch Target Address Cache With Hashed Indices
App 20090198985 - LEVENSTEIN; SHELDON B. ; et al. | 2009-08-06 |
Data Processing System, Processor And Method Of Data Processing Having Branch Target Address Cache Including Address Type Tag Bit
App 20090198962 - LEVITAN; DAVID S. ; et al. | 2009-08-06 |
Data Processing System, Processor And Method Of Data Processing Having Branch Target Address Cache Selectively Applying A Delayed Hit
App 20090198982 - LEVITAN; DAVID S. ; et al. | 2009-08-06 |
Global History Folding Technique Optimized For Timing
App 20090198983 - LEVITAN; DAVID S. | 2009-08-06 |
Data Processing System, Processor And Method Of Data Processing Having Branch Target Address Cache Storing Direct Predictions
App 20090198981 - LEVITAN; DAVID S. ; et al. | 2009-08-06 |
Data Processing System, Processor And Method Of Data Processing Having Improved Branch Target Address Cache
App 20090049286 - Levitan; David S. ; et al. | 2009-02-19 |
Method for resource balancing using dispatch flush in a simultaneous multithread processor
Grant 7,469,407 - Burky , et al. December 23, 2 | 2008-12-23 |
System and Method for Optimizing Branch Logic for Handling Hard to Predict Indirect Branches
App 20080307210 - Levitan; David S. ; et al. | 2008-12-11 |
System And Structure For Synchronized Thread Priority Selection In A Deeply Pipelined Multithreaded Microprocessor
App 20080263325 - Kudva; Prabhakar ; et al. | 2008-10-23 |
Zero cycle penalty in selecting instructions in prefetch buffer in the event of a miss in the instruction cache
Grant 7,032,097 - Alexander , et al. April 18, 2 | 2006-04-18 |
Zero cycle penalty in selecting instructions in prefetch buffer in the event of a miss in the instruction cache
App 20040215921 - Alexander, Gregory W. ; et al. | 2004-10-28 |
Method for resource balancing using dispatch flush in a simultaneous multithread processor
App 20040216105 - Burky, William E. ; et al. | 2004-10-28 |
Data processor with programmable levels of speculative instruction fetching and method of operation
Grant 5,553,255 - Jain , et al. September 3, 1 | 1996-09-03 |
Method and system for single cycle dispatch of multiple instructions in a superscalar processor system
Grant 5,465,373 - Kahle , et al. November 7, 1 | 1995-11-07 |
Counter register implementation for speculative execution of branch on count instructions
Grant 5,421,020 - Levitan May 30, 1 | 1995-05-30 |
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