Levinson; Harry J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Levinson; Harry J..The latest application filed is for "texturing of silicon surface with direct-self assembly patterning".

Company Profile

0.54.31

Levinson; Harry J. - Saratoga CA
Levinson; Harry J - Saratoga CA
Levinson; Harry J. - Sunnyvale CA
Levinson; Harry J. - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Assist cuts disposed in dummy lines to improve metal signal cuts in active lines of a semiconductor structure Grant 9,905,552 - Yuan , et al. February 27, 2	2018-02-27
Assist Cuts Disposed In Dummy Lines To Improve Metal Signal Cuts In Active Lines Of A Semiconductor Structure App 20180053757 - YUAN; Lei ; et al.	2018-02-22
Texturing Of Silicon Surface With Direct-self Assembly Patterning App 20180053662 - PAWLAK; Bartlomiej Jan ; et al.	2018-02-22
Method, Apparatus, And System For Improved Cell Design Having Unidirectional Metal Layout Architecture App 20170323902 - Zeng; Jia ; et al.	2017-11-09
Methods of design rule checking of circuit designs Grant 9,798,852 - Yuan , et al. October 24, 2	2017-10-24
Methods of generating circuit layouts that are to be manufactured using SADP routing techniques Grant 9,613,177 - Yuan , et al. April 4, 2	2017-04-04
Pellicle with aerogel support frame Grant 9,547,232 - Levinson , et al. January 17, 2	2017-01-17
Self-aligned double patterning process for metal routing Grant 9,536,778 - Yuan , et al. January 3, 2	2017-01-03
Methods Of Design Rule Checking Of Circuit Designs App 20160378906 - YUAN; Lei ; et al.	2016-12-29
Self-aligned Double Patterning Process For Metal Routing App 20160293478 - YUAN; Lei ; et al.	2016-10-06
Middle of-line architecture for dense library layout using M0 hand-shake Grant 9,437,588 - Zeng , et al. September 6, 2	2016-09-06
MOL architecture enabling ultra-regular cross couple Grant 9,431,300 - Zeng , et al. August 30, 2	2016-08-30
Pellicle With Aerogel Support Frame App 20160161857 - Levinson; Harry J. ; et al.	2016-06-09
Mask-aware routing and resulting device Grant 9,330,221 - Yuan , et al. May 3, 2	2016-05-03
Methods of patterning line-type features using a multiple patterning process that enables the use of tighter contact enclosure spacing rules Grant 9,287,131 - Yuan , et al. March 15, 2	2016-03-15
Mask-aware Routing And Resulting Device App 20150339428 - YUAN; Lei ; et al.	2015-11-26
Methods Of Patterning Line-type Features Using A Multiple Patterning Process That Enables The Use Of Tighter Contact Enclosure Spacing Rules App 20150243515 - Yuan; Lei ; et al.	2015-08-27
Method for semiconductor wafer fabrication utilizing a cleaning substrate Grant 9,093,481 - Levinson July 28, 2	2015-07-28
Methods Of Generating Circuit Layouts That Are To Be Manufactured Using Sadp Routing Techniques App 20150113484 - Yuan; Lei ; et al.	2015-04-23
Methods of generating circuit layouts that are to be manufactured using SADP techniques Grant 8,966,412 - Yuan , et al. February 24, 2	2015-02-24
Methods of generating circuit layouts that are to be manufactured using SADP routing techniques and virtual non-mandrel mask rules Grant 8,954,913 - Yuan , et al. February 10, 2	2015-02-10
Cut mask aware contact enclosure rule for grating and cut patterning solution Grant 8,918,746 - Yuan , et al. December 23, 2	2014-12-23
Self-aligned double patterning via enclosure design Grant 8,839,168 - Kye , et al. September 16, 2	2014-09-16
Methods of forming contacts for semiconductor devices using a local interconnect processing scheme Grant 8,809,184 - Yuan , et al. August 19, 2	2014-08-19
Optical polarizer with nanotube array Grant 8,792,161 - LaFontaine , et al. July 29, 2	2014-07-29
Self-aligned Double Patterning Via Enclosure Design App 20140208285 - Kye; Jongwook ; et al.	2014-07-24
Method for forming a high resolution resist pattern on a semiconductor wafer Grant 8,586,269 - Okoroanyanwu , et al. November 19, 2	2013-11-19
Methods Of Forming Contacts For Semiconductor Devices Using A Local Interconnect Processing Scheme App 20130295756 - Yuan; Lei ; et al.	2013-11-07
Shape characterization with elliptic fourier descriptor for contact or any closed structures on the chip Grant 8,367,430 - Ma , et al. February 5, 2	2013-02-05
Fluorine-passivated reticles for use in lithography and methods for fabricating the same Grant 8,338,061 - Levinson , et al. December 25, 2	2012-12-25
Methods for fabricating a photolithographic mask and for fabricating a semiconductor integrated circuit using such a mask Grant 8,324,106 - Yuan , et al. December 4, 2	2012-12-04
Methods For Fabricating A Photolithographic Mask And For Fabricating A Semiconductor Integrated Circuit Using Such A Mask App 20120252199 - YUAN; Lei ; et al.	2012-10-04
Method for determining low-noise power spectral density for characterizing line edge roughness in semiconductor wafer processing Grant 8,067,252 - Ma , et al. November 29, 2	2011-11-29
Fluorine-passivated Reticles For Use In Lithography And Methods For Fabricating The Same App 20110244377 - LEVINSON; Harry J. ; et al.	2011-10-06
Method and system for detecting existence of an undesirable particle during semiconductor fabrication Grant 7,986,146 - Levinson , et al. July 26, 2	2011-07-26
Fluorine-passivated reticles for use in lithography and methods for fabricating the same Grant 7,985,513 - Levinson , et al. July 26, 2	2011-07-26
Shape Characterization With Elliptic Fourier Descriptor For Contact Or Any Closed Structures On The Chip App 20110079779 - MA; Yuansheng ; et al.	2011-04-07
Stabilization of deep ultraviolet photoresist Grant 7,851,136 - Levinson , et al. December 14, 2	2010-12-14
Method for removal of immersion lithography medium in immersion lithography processes Grant 7,741,012 - Pawloski , et al. June 22, 2	2010-06-22
Methods For Uniformly Optically Annealing Regions Of A Semiconductor Substrate App 20100041220 - LEVINSON; Harry J.	2010-02-18
Fluorine-passivated Reticles For Use In Lithography And Methods For Fabricating The Same App 20090239155 - LEVINSON; Harry J. ; et al.	2009-09-24
Solution and method for manufacturing an integrated circuit Grant 7,563,560 - Pawloski , et al. July 21, 2	2009-07-21
Method for semiconductor wafer fabrication utilizing a cleaning substrate App 20080257383 - Levinson; Harry J.	2008-10-23
Method for forming a high resolution resist pattern on a semiconductor wafer App 20080233494 - Okoroanyanwu; Uzodinma ; et al.	2008-09-25
Optical polarizer with nanotube array App 20080198453 - LaFontaine; Bruno M. ; et al.	2008-08-21
Method for determining low-noise power spectral density for characterizing line edge roughness in semiconductor wafer processing App 20080194046 - Ma; Yuansheng ; et al.	2008-08-14
Method and system for detecting existence of an undesirable particle during semiconductor fabrication App 20080124820 - Levinson; Harry J. ; et al.	2008-05-29
Method and apparatus for reducing biological contamination in an immersion lithography system Grant 7,315,033 - Pawloski , et al. January 1, 2	2008-01-01
Stabilization Of Deep Ultraviolet Photoresist App 20070281248 - Levinson; Harry J. ; et al.	2007-12-06
Method and apparatus for monitoring and controlling imaging in immersion lithography systems Grant 7,061,578 - Levinson June 13, 2	2006-06-13
Method and apparatus for elimination of bubbles in immersion medium in immersion lithography systems Grant 7,014,966 - Pawloski , et al. March 21, 2	2006-03-21
Method and apparatus for monitoring and controlling imaging in immersion lithography systems Grant 7,006,209 - Levinson February 28, 2	2006-02-28
Extreme ultraviolet (EUV) lithography masks Grant 6,984,475 - Levinson , et al. January 10, 2	2006-01-10
Method and apparatus for elimination of bubbles in immersion medium in immersion lithography systems App 20050048223 - Pawloski, Adam R. ; et al.	2005-03-03
Method and apparatus for monitoring and controlling imaging in immersion lithography systems App 20050037269 - Levinson, Harry J.	2005-02-17
Method and apparatus for monitoring and controlling imaging in immersion lithography systems App 20050018208 - Levinson, Harry J.	2005-01-27
Ultra-thin resist shallow trench process using high selectivity nitride etch Grant 6,740,566 - Lyons , et al. May 25, 2	2004-05-25
Selective photoresist hardening to facilitate lateral trimming Grant 6,716,571 - Gabriel , et al. April 6, 2	2004-04-06
Attenuated phase shift mask for use in EUV lithography and a method of making such a mask Grant 6,645,679 - La Fontaine , et al. November 11, 2	2003-11-11
Method of and system for improving stability of photomasks Grant 6,627,355 - Levinson , et al. September 30, 2	2003-09-30
Pellicle for use in EUV lithography and a method of making such a pellicle Grant 6,623,893 - Levinson , et al. September 23, 2	2003-09-23
Differential wavelength inspection system Grant 6,608,321 - La Fontaine , et al. August 19, 2	2003-08-19
Pellicle for use in small wavelength lithography and a method for making such a pellicle using polymer films Grant 6,593,035 - Levinson , et al. July 15, 2	2003-07-15
Pellicle for use in small wavelength lithography and a method for making such a pellicle Grant 6,544,693 - Levinson , et al. April 8, 2	2003-04-08
Selective photoresist hardening to facilitate lateral trimming App 20020139773 - Gabriel, Calvin T. ; et al.	2002-10-03
Method of and system for improving stability of photomasks App 20020132171 - Levinson, Harry J. ; et al.	2002-09-19
Pellicle for use in small wavelength lithography and a method for making such a pellicle App 20020127477 - Levinson, Harry J. ; et al.	2002-09-12
Ultra-thin Resist Shallow Trench Process Using Metal Hard Mask App 20010038972 - LYONS, CHRISTOPHER F. ; et al.	2001-11-08
Thin resist with nitride hard mask for gate etch application Grant 6,309,926 - Bell , et al. October 30, 2	2001-10-30
Ultra-thin Resist Shallow Trench Process Using High Selectivity Nitride Etch App 20010014512 - LYONS, CHRISTOPHER F. ; et al.	2001-08-16
Method and system for improving transmission of light through photomasks Grant 6,251,545 - Levinson June 26, 2	2001-06-26
Method using a thin resist mask for dual damascene stop layer etch Grant 6,184,128 - Wang , et al. February 6, 2	2001-02-06
Thin resist with amorphous silicon hard mask for via etch application Grant 6,165,695 - Yang , et al. December 26, 2	2000-12-26
Ultra-thin resist and silicon/oxide hard mask for metal etch Grant 6,156,658 - Wang , et al. December 5, 2	2000-12-05
System for controlling reflection reticle temperature in microlithography Grant 6,098,408 - Levinson , et al. August 8, 2	2000-08-08
Mark protection scheme with no masking Grant 6,057,206 - Nguyen , et al. May 2, 2	2000-05-02
Ultra-thin resist and nitride/oxide hard mask for metal etch Grant 6,020,269 - Wang , et al. February 1, 2	2000-02-01
Method and apparatus for wafer-focusing Grant 5,748,323 - Levinson May 5, 1	1998-05-05
Via in a planarized dielectric and process for producing same Grant 4,789,760 - Koyama , et al. December 6, 1	1988-12-06

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