Leung; Wai-Bor

Patent Applications and Registrations

Patent applications and USPTO patent grants for Leung; Wai-Bor.The latest application filed is for "heterogeneous high-speed serial interface system architecture".

Company Profile

1.15.6

Leung; Wai-Bor - Milpitas CA
- Milpitas CA US
Leung; Wai-Bor - Wescosville PA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Integrated circuit device with stitched interposer Grant 8,866,304 - Rahman , et al. October 21, 2	2014-10-21
Heterogeneous high-speed serial interface system with phase-locked loop architecture and clock distribution system Grant 8,812,755 - Singh , et al. August 19, 2	2014-08-19
Heterogeneous High-speed Serial Interface System Architecture App 20140176188 - SINGH; Surinder ; et al.	2014-06-26
Integrated Circuit Device With Stitched Interposer App 20140175666 - Rahman; Arifur ; et al.	2014-06-26
Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry Grant 8,751,551 - Streicher , et al. June 10, 2	2014-06-10
Heterogeneous high-speed serial interface system with phase-locked loop architecture and clock distribution system Grant 8,700,825 - Singh , et al. April 15, 2	2014-04-15
Modular Digital Signal Processing Circuitry With Optionally Usable, Dedicated Connections Between Modules Of The Circuitry App 20140082035 - Streicher; Keone ; et al.	2014-03-20
Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry Grant 08620977 -	2013-12-31
Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry Grant 8,620,977 - Streicher , et al. December 31, 2	2013-12-31
Modular Digital Signal Processing Circuitry With Optionally Usable, Dedicated Connections Between Modules Of The Circuitry App 20130332497 - Streicher; Keone ; et al.	2013-12-12
Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry Grant 8,549,055 - Streicher , et al. October 1, 2	2013-10-01
DSP block for implementing large multiplier on a programmable integrated circuit device Grant 8,307,023 - Leung , et al. November 6, 2	2012-11-06
Modular Digital Signal Processing Circuitry With Optionally Usable, Dedicated Connections Between Modules Of The Circuitry App 20100228806 - Streicher; Keone ; et al.	2010-09-09
Distributed multiple-channel alignment scheme Grant 7,532,646 - Leung , et al. May 12, 2	2009-05-12
Distributed multiple-channel alignment scheme App 20060187966 - Leung; Wai-Bor ; et al.	2006-08-24
Field programmable gate array having a dedicated processor interface Grant 6,216,191 - Britton , et al. April 10, 2	2001-04-10
Programmable clock manager for a programmable logic device that can implement delay-locked loop functions Grant 6,043,677 - Albu , et al. March 28, 2	2000-03-28
Programmable clock manager for a programmable logic device that can generate at least two different output clocks Grant 6,028,463 - Albu , et al. February 22, 2	2000-02-22
Method and apparatus for verifying whether a bitstream received by a field programmable gate array (FPGA) is intended for that FPGA Grant 5,457,408 - Leung October 10, 1	1995-10-10
Apparatus and method to improve programming speed of field programmable gate arrays Grant 5,394,031 - Britton , et al. February 28, 1	1995-02-28
Programmable function unit with programmable fast ripple logic Grant 5,386,156 - Britton , et al. January 31, 1	1995-01-31

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