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Patent applications and USPTO patent grants for Leung; Che Choi.The latest application filed is for "high voltage tolerant input/output interface circuit".
Patent | Date |
---|---|
High voltage tolerant input/output interface circuit Grant 8,310,275 - Harris , et al. November 13, 2 | 2012-11-13 |
Interdigitated capacitors Grant 8,039,923 - Harris , et al. October 18, 2 | 2011-10-18 |
High Voltage Tolerant Input/Output Interface Circuit App 20110043249 - Harris; Edward B. ;   et al. | 2011-02-24 |
Interdigitated Capacitors App 20100061036 - Harris; Edward B. ;   et al. | 2010-03-11 |
Interdigitated capacitors Grant 7,635,888 - Harris , et al. December 22, 2 | 2009-12-22 |
Electrostatic discharge device verification in an integrated circuit Grant 7,617,467 - Bell , et al. November 10, 2 | 2009-11-10 |
Electrostatic Discharge Device Verification in an Integrated Circuit App 20080148199 - Bell; David Averill ;   et al. | 2008-06-19 |
Interdigitaded capacitors Grant 7,022,581 - Harris , et al. April 4, 2 | 2006-04-04 |
Interdigitaded capacitors App 20060054994 - Harris; Edward B. ;   et al. | 2006-03-16 |
Interdigitaded capacitors App 20060006496 - Harris; Edward B. ;   et al. | 2006-01-12 |
ESD protection for differential mode magnetic transducer App 20050254158 - Kuehne, Stephen C. ;   et al. | 2005-11-17 |
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