loadpatents
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name:-0.011049032211304
name:-0.0013539791107178
Letavic; Theodore James Patent Filings

Letavic; Theodore James

Patent Applications and Registrations

Patent applications and USPTO patent grants for Letavic; Theodore James.The latest application filed is for "collapsed mode operable cmut including contoured substrate".

Company Profile
0.10.7
  • Letavic; Theodore James - Putnam Valley NY US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Collapsed mode operable cMUT including contoured substrate
Grant 8,787,116 - Petruzzello , et al. July 22, 2
2014-07-22
Reliable lighting system
Grant 8,395,323 - Wendt , et al. March 12, 2
2013-03-12
BiCMOS integration of multiple-times-programmable non-volatile memories
Grant 7,989,875 - Noort , et al. August 2, 2
2011-08-02
Collapsed Mode Operable Cmut Including Contoured Substrate
App 20110040189 - Petruzzello; John ;   et al.
2011-02-17
Reliable Lighting System
App 20100301756 - Wendt; Matthias ;   et al.
2010-12-02
Lateral thin-film SOI device having a field plate with isolated metallic regions
Grant 7,737,524 - Letavic June 15, 2
2010-06-15
Bicmos Integration Of Multiple-times-programmable Non-volatile Memories
App 20100127318 - NOORT; Wibo Van ;   et al.
2010-05-27
Substrate isolated integrated high voltage diode integrated within a unit cell
Grant 7,659,584 - Letavic February 9, 2
2010-02-09
Asymetrical Field-Effect Semiconductor Device with Sti Region
App 20080303092 - Letavic; Theodore James
2008-12-11
Substrate Isolated Intergrated High Voltage Diode Integrated Within A Unit Cell
App 20080265327 - Letavic; Theodore James
2008-10-30
HV-SOI LDMOS device with integrated diode to improve reliability and avalanche ruggedness
App 20040232510 - Petruzzello, John ;   et al.
2004-11-25
HV-SOI LDMOS device with integrated diode to improve reliability and avalanche ruggedness
Grant 6,794,719 - Petruzzello , et al. September 21, 2
2004-09-21
Soi Ldmos Structure With Improved Switching Characteristics
App 20020155646 - Petruzzello, John ;   et al.
2002-10-24
SOI LDMOS structure with improved switching characteristics
Grant 6,468,878 - Petruzzello , et al. October 22, 2
2002-10-22
Microwave monolithic integrated circuit with coplaner waveguide having silicon-on-insulator composite substrate
Grant 5,986,331 - Letavic , et al. November 16, 1
1999-11-16

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