loadpatents
Patent applications and USPTO patent grants for Ler; Chun Lee.The latest application filed is for "inductor structures with improved quality factor".
Patent | Date |
---|---|
Adjustable ground shielding circuitry Grant 9,583,554 - Ler , et al. February 28, 2 | 2017-02-28 |
Interleaved T-coil structure and a method of manufacturing the T-coil structure Grant 9,502,168 - Ler , et al. November 22, 2 | 2016-11-22 |
Multiple gate semiconductor devices and their applications Grant 9,166,052 - Ler , et al. October 20, 2 | 2015-10-20 |
Inductor Structures With Improved Quality Factor App 20150263082 - Ler; Chun Lee ;   et al. | 2015-09-17 |
Parallel stacked symmetrical and differential inductor Grant 9,111,676 - Ler , et al. August 18, 2 | 2015-08-18 |
Multiple gate semiconductor devices and their applications Grant 8,928,382 - Ler , et al. January 6, 2 | 2015-01-06 |
Parallel Stacked Symmetrical And Differential Inductor App 20130249660 - LER; Chun Lee ;   et al. | 2013-09-26 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.