Leppla; Bernd
Patent Applications and Registrations
Patent applications and USPTO patent grants for Leppla; Bernd.The latest application filed is for "method of operating a crossbar switch".
- Leppla; Bernd - Buchen-Boedigheim DE
- Leppla; Bernd - Buchen-Bodeigheim DE
- Leppla; Bernd - Ehningen DE
- Leppla; Bernd - Chiningen DE
- Leppla; Bernd - Grafenau-Datzingen DE
| Patent | Date |
|---|---|
| Buffered crossbar switch Grant 7,826,434 - Goldrian , et al. November 2, 2 | 2010-11-02 |
| Buffered crossbar switch and its method of operation Grant 7,349,388 - Goldrian , et al. March 25, 2 | 2008-03-25 |
| Method of operating a crossbar switch Grant 7,269,158 - Francois , et al. September 11, 2 | 2007-09-11 |
| Control logic implementation for a non-blocking switch network Grant 7,197,540 - Goldrian , et al. March 27, 2 | 2007-03-27 |
| Switching arrangement and method with separated output buffers Grant 7,145,873 - Luijten , et al. December 5, 2 | 2006-12-05 |
| Method of operating a crossbar switch Grant 7,089,346 - Cebulla , et al. August 8, 2 | 2006-08-08 |
| Method of operating a buffered crossbar switch Grant 6,909,710 - Goldrian , et al. June 21, 2 | 2005-06-21 |
| Method of operating a crossbar switch App 20040073739 - Cebulla, Markus ; et al. | 2004-04-15 |
| Method of operating a crossbar switch App 20040047334 - Francois, Abel ; et al. | 2004-03-11 |
| Control logic implementation for a non-blocking switch network App 20020152263 - Goldrian, Gottfried A. ; et al. | 2002-10-17 |
| High availability error self-recovering shared cache for multiprocessor systems Grant 6,014,756 - Dottling , et al. January 11, 2 | 2000-01-11 |
| Logical bus structure including plural physical busses for a multiprocessor system with a multi-level cache memory structure Grant 5,889,969 - Getzlaff , et al. March 30, 1 | 1999-03-30 |
| Electrical circuit for generating pulse strings Grant 5,306,959 - Knauft , et al. April 26, 1 | 1994-04-26 |
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