Patent | Date |
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Programmable interconnection device Grant 9,362,918 - Lepape June 7, 2 | 2016-06-07 |
Programmable Interconnection Device App 20160049942 - LEPAPE; Olivier | 2016-02-18 |
Memory with five-transistor bit cells and associated control circuit Grant 8,072,796 - Barbier , et al. December 6, 2 | 2011-12-06 |
Configurable circuit with configuration data protection features Grant 7,260,218 - Reblewski , et al. August 21, 2 | 2007-08-21 |
Configurable circuit with configuration data protection features App 20070103193 - Reblewski; Frederic ;   et al. | 2007-05-10 |
Regionally time multiplexed emulation system Grant 7,098,688 - Reblewski , et al. August 29, 2 | 2006-08-29 |
Crossbar device with reduced parasitic capacitive loading and usage of crossbar devices in reconfigurable circuits Grant 6,874,136 - Reblewski , et al. March 29, 2 | 2005-03-29 |
Reconfigurable integrated circuit with integrated debugging facilities and scalable programmable interconnect App 20040178820 - Barbier, Jean ;   et al. | 2004-09-16 |
Regionally time multiplexed emulation system App 20040075469 - Reblewski, Frederic ;   et al. | 2004-04-22 |
Reconfigurable integrated circuit with integrated debugging facilities and scalable programmable interconnect Grant 6,717,433 - Barbier , et al. April 6, 2 | 2004-04-06 |
Emulation system scaling Grant 6,647,362 - Reblewski , et al. November 11, 2 | 2003-11-11 |
Crossbar device with reduced parasitic capacitive loading and usage of crossbar devices in reconfigurable circuits App 20030131331 - Reblewski, Frederic ;   et al. | 2003-07-10 |
Reconfigurable integrated circuit with integrated debugging facilities for use in an emulation system Grant 6,265,894 - Reblewski , et al. July 24, 2 | 2001-07-24 |
Field programmable gate array with integrated debugging facilities Grant 6,057,706 - Barbier , et al. May 2, 2 | 2000-05-02 |
Method and apparatus tracing any node of an emulation Grant 5,999,725 - Barbier , et al. December 7, 1 | 1999-12-07 |
Emulation system having a scalable multi-level multi-stage hybrid programmable interconnect network Grant 5,907,697 - Barbier , et al. May 25, 1 | 1999-05-25 |
Method and apparatus for removing timing hazards in a circuit design Grant 5,831,866 - Burgun , et al. November 3, 1 | 1998-11-03 |
Method and apparatus for tracing any node of an emulation Grant 5,790,832 - Barbier , et al. August 4, 1 | 1998-08-04 |
Method and apparatus for performing fully visible tracing of an emulation Grant 5,754,827 - Barbier , et al. May 19, 1 | 1998-05-19 |
Emulation system having a scalable multi-level multi-stage programmable interconnect network Grant 5,574,388 - Barbier , et al. November 12, 1 | 1996-11-12 |