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name:-0.0074279308319092
name:-0.013908863067627
name:-0.0054540634155273
Leong; Han Hua Patent Filings

Leong; Han Hua

Patent Applications and Registrations

Patent applications and USPTO patent grants for Leong; Han Hua.The latest application filed is for "techniques for reduction of degradation in channels caused by bias temperature instability".

Company Profile
4.12.6
  • Leong; Han Hua - Butterworth MY
  • Leong; Han Hua - Penang MY
  • Leong; Han Hua - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Techniques For Reduction Of Degradation In Channels Caused By Bias Temperature Instability
App 20220268837 - Leong; Han Hua ;   et al.
2022-08-25
Methods and apparatus for secure implemention of integrated circuits
Grant 10,867,095 - Leong , et al. December 15, 2
2020-12-15
Techniques For Determining Timestamp Inaccuracies In A Transceiver
App 20190319729 - Leong; Han Hua ;   et al.
2019-10-17
Methods and apparatus for high-speed serial interface link assist
Grant 10,417,169 - Leong , et al. Sept
2019-09-17
Methods And Apparatus For Secure Implemention Of Integrated Circuits
App 20190213295 - Leong; Han Hua ;   et al.
2019-07-11
Low-skew channel bonding using phase-measuring FIFO buffer
Grant 10,291,442 - Mendel , et al.
2019-05-14
Adaptive rate-matching first-in first-out (FIFO) system
Grant 10,146,249 - Leong , et al. De
2018-12-04
Adaptive Rate-matching First-in First-out (fifo) System
App 20180088622 - Leong; Han Hua ;   et al.
2018-03-29
Low-skew Channel Bonding Using Phase-measuring Fifo Buffer
App 20170353335 - MENDEL; David W. ;   et al.
2017-12-07
Low-skew channel bonding using phase-measuring FIFO buffer
Grant 9,774,478 - Mendel , et al. September 26, 2
2017-09-26
Latency computation circuitry
Grant 9,268,888 - Leong , et al. February 23, 2
2016-02-23
Integrated circuit (IC) clocking techniques
Grant 9,246,497 - Leong January 26, 2
2016-01-26
Methods and apparatus for aligning signals in transceiver circuitry
Grant 9,106,504 - Lee , et al. August 11, 2
2015-08-11
Latency built-in self-test
Grant 9,100,112 - Leong , et al. August 4, 2
2015-08-04
Integrated circuit (IC) clocking techniques
Grant 8,755,480 - Leong June 17, 2
2014-06-17
System and method for aligning a quadrature encoder and establishing a decoder processing speed
Grant 7,461,317 - Low , et al. December 2, 2
2008-12-02
System and method for aligning a quadrature encoder and establishing a decoder processing speed
App 20070143658 - Low; Moon Leong ;   et al.
2007-06-21

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