Leonard; Todd Edwin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Leonard; Todd Edwin.The latest application filed is for "environmental and computing cost reduction with improved reliability in workload assignment to distributed computing nodes".

Company Profile

0.6.6

Leonard; Todd Edwin - Williston VT US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Environmental and computing cost reduction with improved reliability in workload assignment to distributed computing nodes Grant 8,793,365 - Arsovski , et al. July 29, 2	2014-07-29
Structure for hardware assisted bus state transition circuit using content addressable memories Grant 8,347,019 - Bueti , et al. January 1, 2	2013-01-01
Environmental And Computing Cost Reduction With Improved Reliability In Workload Assignment To Distributed Computing Nodes App 20100228861 - Arsovski; Igor ; et al.	2010-09-09
Design Structure For Automated Means For Determining Internet Access On A System On A Chip App 20100011138 - Ebbers; Jonathan Phillip ; et al.	2010-01-14
Method and apparatus for transmitting data in an integrated circuit Grant 7,571,377 - Connolly , et al. August 4, 2	2009-08-04
Structure For Executing Software Within Real-time Hardware Constraints Using Functionally Programmable Branch Table App 20080278195 - Goodnow; Kenneth ; et al.	2008-11-13
Design Structure For Hardware Assisted Bus State Transition Circuit Using Content Addressable Memories App 20080282015 - Bueti; Serafino ; et al.	2008-11-13
Hardware Assisted Bus State Transition Using Content Addressable Memories. App 20080183941 - Bueti; Serafino ; et al.	2008-07-31
Method And Apparatus For Transmitting Data In An Integrated Circuit App 20070147430 - Connolly; Brian John ; et al.	2007-06-28
Communications adapter for implementing communications in a network and providing multiple modes of communications Grant 6,765,911 - Branstad , et al. July 20, 2	2004-07-20
Parallel hierarchical timing correction Grant 5,877,965 - Hieter , et al. March 2, 1	1999-03-02

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.