| Patent | Date |
|---|
Executing programs of a first system on a second system
Grant 5,983,012 - Bianchi , et al. November 9, 1 | 1999-11-09 |
Method of optimizing the execution of program instuctions by an emulator using a plurality of execution units
Grant 5,678,032 - Woods, deceased , et al. October 14, 1 | 1997-10-14 |
Method for organizing state machine by selectively grouping status signals as inputs and classifying commands to be executed into performance sensitive and nonsensitive categories
Grant 5,375,248 - Lemay , et al. December 20, 1 | 1994-12-20 |
Bus controller having state machine for translating commands and controlling accesses from system bus to synchronous bus having different bus protocols
Grant 5,341,495 - Joyce , et al. August 23, 1 | 1994-08-23 |
Microprocessor bus interface protocol analyzer
Grant 5,293,384 - Keeley , et al. March 8, 1 | 1994-03-08 |
High performance burst read data transfer operation
Grant 5,291,580 - Bowden, III , et al. March 1, 1 | 1994-03-01 |
State machine for executing commands within a minimum number of cycles by accomodating unforseen time dependency according to status signals received from different functional sections
Grant 5,280,595 - Lemay , et al. January 18, 1 | 1994-01-18 |
Recovery method and apparatus for a pipelined processing unit of a multiprocessor system
Grant 5,193,181 - Barlow , et al. March 9, 1 | 1993-03-09 |
Multiple shared memory arrangement wherein multiple processors individually and concurrently access any one of plural memories
Grant 5,136,500 - Lemay , et al. August 4, 1 | 1992-08-04 |
Memory addressing arrangement
Grant 4,964,037 - Woods , et al. October 16, 1 | 1990-10-16 |
Address boundary detector
Grant 4,837,738 - Lemay , et al. June 6, 1 | 1989-06-06 |
Multifunction arithmetic indicator
Grant 4,811,266 - Woods , et al. March 7, 1 | 1989-03-07 |
Memory failure detection apparatus
Grant 4,809,276 - Lemay , et al. February 28, 1 | 1989-02-28 |
Flexible logic transfer and instruction decoding system
Grant 4,467,417 - Woods , et al. August 21, 1 | 1984-08-21 |
Logic control system including cache memory for CPU-memory transfers
Grant 4,460,959 - Lemay , et al. July 17, 1 | 1984-07-17 |
Logic control system for efficient memory to CPU transfers
Grant 4,455,606 - Cushing , et al. June 19, 1 | 1984-06-19 |
Bus sourcing and shifter control of a central processing unit
Grant 4,451,883 - Stanley , et al. May 29, 1 | 1984-05-29 |
Memory management unit for developing multiple physical addresses in parallel for use in a cache memory
Grant 4,378,591 - Lemay March 29, 1 | 1983-03-29 |
Apparatus for performing the scientific add instruction
Grant 4,308,589 - Joyce , et al. December 29, 1 | 1981-12-29 |
Communications processor employing line-dedicated memory tables for supervising data transfers
Grant 4,261,033 - Lemay , et al. April 7, 1 | 1981-04-07 |
Hardware/firmware communication line adapter
Grant 4,254,462 - Raymond , et al. March 3, 1 | 1981-03-03 |
System providing adaptive response in information requesting unit
Grant 4,245,299 - Woods , et al. January 13, 1 | 1981-01-13 |
System providing multiple fetch bus cycle operation
Grant 4,236,203 - Curley , et al. November 25, 1 | 1980-11-25 |
Transfer control technique between two units included in a data processing system
Grant 4,225,921 - Hartley , et al. September 30, 1 | 1980-09-30 |
Multiple length address formation in a microprogrammed data processing system
Grant 4,206,503 - Woods , et al. June 3, 1 | 1980-06-03 |
System providing multiple outstanding information requests
Grant 4,181,974 - Lemay , et al. January 1, 1 | 1980-01-01 |
Control system providing for the transfer of data in a communications processing system employing channel dedicated control blocks
Grant 4,133,030 - Huettner , et al. January 2, 1 | 1979-01-02 |
Synchronization technique for data transfers over an asynchronous common bus network coupling data processing apparatus
Grant 4,050,097 - Miu , et al. September 20, 1 | 1977-09-20 |
Data processing system providing split bus cycle operation
Grant 3,997,896 - Cassarino, Jr. , et al. December 14, 1 | 1976-12-14 |
Apparatus for processing data transfer requests in a data processing system
Grant 3,993,981 - Cassarino, Jr. , et al. November 23, 1 | 1976-11-23 |
Data Processing System Having An Improved Overlap Instruction Fetch And Instruction Execution Feature
Grant 3,811,114 - Lemay , et al. May 14, 1 | 1974-05-14 |
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