Leijten; Jeroen Anton Johan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Leijten; Jeroen Anton Johan.The latest application filed is for "method and apparatus and record carrier".

Company Profile

0.21.18

Leijten; Jeroen Anton Johan - Eindhoven N/A NL
Leijten; Jeroen Anton Johan - Hulsel N/A NL

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Lower power assembler Grant 9,201,657 - Leijten December 1, 2	2015-12-01
Method and apparatus and record carrier Grant 8,954,941 - Zwartenkot , et al. February 10, 2	2015-02-10
Data processing circuit with a plurality of instruction modes for processing time-stationary encoded instructions, and method of operating/scheduling such data circuit Grant 8,838,945 - Leijten , et al. September 16, 2	2014-09-16
Method and apparatus for designing a processor Grant 8,433,553 - Augusteijn , et al. April 30, 2	2013-04-30
Method And Apparatus And Record Carrier App 20120265972 - Zwartenkot; Hendrik Tjeerd Joannes ; et al.	2012-10-18
Data Processing Circuit With A Plurality Of Instruction Modes, Method Of Operating Such A Data Circuit And Scheduling Method For Such A Data Circuit App 20120179894 - Leijten; Jeroen Anton Johan ; et al.	2012-07-12
Data processing circuit with a plurality of instruction modes, method of operating such a data circuit and scheduling method for such a data circuit Grant 8,145,888 - Leijten , et al. March 27, 2	2012-03-27
Register systems and methods for a multi-issue processor Grant 8,095,780 - Leijten January 10, 2	2012-01-10
Run-time selection of feed-back connections in a multiple-instruction word processor Grant 7,937,572 - Augusteijn , et al. May 3, 2	2011-05-03
Variable length VLIW instruction with instruction fetch control bits for prefetching, stalling, or realigning in order to handle padding bits and instructions that cross memory line boundaries Grant 7,873,813 - Leijten January 18, 2	2011-01-18
Data Processing Circuit With A Plurality Of Instruction Modes, Method Of Operating Such A Data Circuit And Scheduling Method For Such A Data Circuit App 20100185835 - Leijten; Jeroen Anton Johan ; et al.	2010-07-22
Lower Power Assembler App 20100153691 - Leijten; Jeroen Anton Johan	2010-06-17
Method And Apparatus For Designing A Processor App 20090281784 - Augusteijn; Alexander ; et al.	2009-11-12
Processing apparatus including dedicated issue slot for loading immediate value, and processing method therefor Grant 7,574,583 - Leijten , et al. August 11, 2	2009-08-11
Processing apparatus, processing method and compiler Grant 7,313,671 - Leijten December 25, 2	2007-12-25
Pseudo multiport data memory has stall facility Grant 7,308,540 - Leijten December 11, 2	2007-12-11
Zero overhead branching and looping in time stationary processors Grant 7,302,555 - Leijten November 27, 2	2007-11-27
Run-time selection of feed-back connections in a multiple-instruction word processor App 20070174590 - Augusteijn; Alexander ; et al.	2007-07-26
Programmed access latency in mock multiport memory Grant 7,231,478 - Leijten June 12, 2	2007-06-12
Zero overhead branching and looping in time stationary processors App 20070055851 - Leijten; Jeroen Anton Johan	2007-03-08
Processing apparatus, processing method and compiler App 20060168424 - Leijten; Jeroen Anton Johan ; et al.	2006-07-27
Interruptible digital signal processor having two instruction sets Grant 7,082,518 - Leijten , et al. July 25, 2	2006-07-25
Signal processing device and method for supplying a signal processing result to a plurality of registers Grant 7,032,102 - Leijten , et al. April 18, 2	2006-04-18
Stack type snapshot buffer handles nested interrupts App 20050262389 - Leijten, Jeroen Anton Johan	2005-11-24
Processing apparatus, processing method and compiler App 20050257027 - Leijten, Jeroen Anton Johan	2005-11-17
Retargetable compiling system and method Grant 6,948,158 - Van Gageldonk , et al. September 20, 2	2005-09-20
Programmed access latency in mock multiport memory App 20050177689 - Leijten, Jeroen Anton Johan	2005-08-11
Pseudo multiport data memory has stall facility App 20050166021 - Leijten, Jeroen Anton Johan	2005-07-28
Multi-issue processor App 20050132170 - Leijten, Jeroen Anton Johan	2005-06-16
Data processor utilizing set-associative cache memory for stream and non-stream memory addresses Grant 6,643,738 - Timmer , et al. November 4, 2	2003-11-04
Computer instruction with instruction fetch control bits App 20020116598 - Leijten, Jeroen Anton Johan	2002-08-22
Signal processing device and method for supplying a signal processing result to a plurality of registers App 20020091911 - Leijten, Jeroen Anton Johan ; et al.	2002-07-11
Digital signal processing apparatus App 20020083253 - Leijten, Jeroen Anton Johan ; et al.	2002-06-27
Retargetable compiling system and method App 20020042909 - Van Gageldonk, Johan Sebastiaan Henri ; et al.	2002-04-11
Data processor with cache App 20020004876 - Timmer, Adwin Hugo ; et al.	2002-01-10

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