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name:-0.023760080337524
name:-0.010278940200806
Lei; Junjiang Patent Filings

Lei; Junjiang

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lei; Junjiang.The latest application filed is for "synchronized parallel tile computation for large area lithography simulation".

Company Profile
10.25.20
  • Lei; Junjiang - Fremont CA
  • Lei; Junjiang - Hsinchu TW
  • Lei; Junjiang - Bellevue WA US
  • Lei; Junjiang - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Synchronized Parallel Tile Computation for Large Area Lithography Simulation
App 20220291659 - Peng; Danping ;   et al.
2022-09-15
Machine Learning Based Model Builder And Its Applications For Pattern Transferring In Semiconductor Manufacturing
App 20220284166 - YU; Zhiru ;   et al.
2022-09-08
Synchronized parallel tile computation for large area lithography simulation
Grant 11,340,584 - Peng , et al. May 24, 2
2022-05-24
Sub-Resolution Assist Features
App 20210247689 - Yamazoe; Kenji ;   et al.
2021-08-12
Synchronized Parallel Tile Computation for Large Area Lithography Simulation
App 20210181713 - Peng; Danping ;   et al.
2021-06-17
Sub-resolution assist features
Grant 10,990,002 - Yamazoe , et al. April 27, 2
2021-04-27
Lithographic Mask Correction Using Volume Correction Techniques
App 20210072648 - YU; Zhiru ;   et al.
2021-03-11
Synchronized parallel tile computation for large area lithography simulation
Grant 10,915,090 - Peng , et al. February 9, 2
2021-02-09
Sub-Resolution Assist Features
App 20210026237 - Yamazoe; Kenji ;   et al.
2021-01-28
Lithographic mask correction using volume correction techniques
Grant 10,838,305 - Yu , et al. November 17, 2
2020-11-17
Synchronized Parallel Tile Computation for Large Area Lithography Simulation
App 20200293023 - Peng; Danping ;   et al.
2020-09-17
Synchronized parallel tile computation for large area lithography simulation
Grant 10,671,052 - Beylkin , et al.
2020-06-02
Lithographic Mask Correction Using Volume Correction Techniques
App 20200004161 - YU; Zhiru ;   et al.
2020-01-02
Guiding patterns optimization for directed self-assembly
Grant 10,311,165 - Lei , et al.
2019-06-04
Synchronized Parallel Tile Computation For Large Area Lithography Simulation
App 20190146455 - Beylkin; Daniel ;   et al.
2019-05-16
Optical proximity correction for directed-self-assembly guiding patterns
Grant 9,836,556 - Lei , et al. December 5, 2
2017-12-05
Optical Proximity Correction For Directed-Self-Assembly Guiding Patterns
App 20160292348 - Lei; Junjiang ;   et al.
2016-10-06
Guiding Patterns Optimization For Directed Self-Assembly
App 20160292309 - Lei; Junjiang ;   et al.
2016-10-06
Neighbor-aware edge fragment adjustment for optical proximity correction
Grant 8,910,098 - Lei , et al. December 9, 2
2014-12-09
Optical proximity correction based on edge fragment correlation
Grant 8,881,070 - Lippincott , et al. November 4, 2
2014-11-04
Method and system for model-based design and layout of an integrated circuit
Grant 8,677,301 - Lai , et al. March 18, 2
2014-03-18
Method and system for model-based design and layout of an integrated circuit
Grant 8,645,887 - Lai , et al. February 4, 2
2014-02-04
Edge fragment correlation determination for optical proximity correction
Grant 8,539,391 - Lei , et al. September 17, 2
2013-09-17
Edge Fragment Correlation Determination For Optical Proximity Correction
App 20130198698 - Lei; Junjiang ;   et al.
2013-08-01
Method and system for model-based design and layout of an integrated circuit
Grant 8,381,152 - Lai , et al. February 19, 2
2013-02-19
Interpolation of irregular data in a finite-dimensional metric space in lithographic simulation
Grant 8,358,828 - Doddi , et al. January 22, 2
2013-01-22
Pattern signature
Grant 8,341,571 - Lei , et al. December 25, 2
2012-12-25
Method And System For Model-based Design And Layout Of An Integrated Circuit
App 20120272200 - Lai; Ya-Chieh ;   et al.
2012-10-25
Method And System For Model-based Design And Layout Of An Integrated Circuit
App 20120272201 - Lai; Ya-Chieh ;   et al.
2012-10-25
Intelligent pattern signature based on lithography effects
Grant 8,291,351 - Lei , et al. October 16, 2
2012-10-16
Method and system for performing pattern classification of patterns in integrated circuit designs
Grant 8,079,005 - Lai , et al. December 13, 2
2011-12-13
Intelligent Pattern Signature Based On Lithography Effects
App 20110239168 - Lei; Junjiang ;   et al.
2011-09-29
Intelligent pattern signature based on lithography effects
Grant 7,966,586 - Lei , et al. June 21, 2
2011-06-21
Pattern signature
Grant 7,904,853 - Lei , et al. March 8, 2
2011-03-08
Method And System For Performing Pattern Classification Of Patterns In Integrated Circuit Designs
App 20100083208 - Lai; Ya-Chieh ;   et al.
2010-04-01
Method And System For Model-based Design And Layout Of An Integrated Circuit
App 20090307642 - Lai; Ya-Chieh ;   et al.
2009-12-10
Method and system for implementing optimized lithography models for accuracy and resolution
Grant 7,631,289 - Lei December 8, 2
2009-12-08
Interpolation Of Irregular Data In A Finite-dimensional Metric Space In Lithographic Simulation
App 20090169114 - Doddi; Srini ;   et al.
2009-07-02
Intelligent Pattern Signature Based on Lithography Effects
App 20090150836 - Lei; Junjiang ;   et al.
2009-06-11

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