Leedy; Glenn Joseph
Patent Applications and Registrations
Patent applications and USPTO patent grants for Leedy; Glenn Joseph.The latest application filed is for "flexible and elastic dielectric integrated circuit".
- Leedy; Glenn Joseph - Saline MI
- Leedy; Glenn Joseph - Montecito CA
| Patent | Date |
|---|---|
| Stress-controlled dielectric integrated circuit Grant 7,550,805 - Leedy June 23, 2 | 2009-06-23 |
| Flexible and elastic dielectric integrated circuit App 20080302559 - Leedy; Glenn Joseph | 2008-12-11 |
| Lithography device for semiconductor circuit pattern generation App 20050156265 - Leedy, Glenn Joseph | 2005-07-21 |
| Methods for maskless lithography App 20050130351 - Leedy, Glenn Joseph | 2005-06-16 |
| Membrane 3D IC fabrication App 20050082626 - Leedy, Glenn Joseph | 2005-04-21 |
| Flexible and elastic dielectric integrated circuit App 20050082641 - Leedy, Glenn Joseph | 2005-04-21 |
| Stress-controlled Dielectric Integrated Circuit App 20050051841 - Leedy, Glenn Joseph | 2005-03-10 |
| Membrane IC fabrication App 20040197951 - Leedy, Glenn Joseph | 2004-10-07 |
| Apparatus and methods for maskless pattern generation App 20040192045 - Leedy, Glenn Joseph | 2004-09-30 |
| Membrane 3D IC fabrication App 20040150068 - Leedy, Glenn Joseph | 2004-08-05 |
| Membrane 3D IC fabrication Grant 6,765,279 - Leedy July 20, 2 | 2004-07-20 |
| Membrane 3D IC fabrication App 20040132303 - Leedy, Glenn Joseph | 2004-07-08 |
| Stress controlled dielectric integrated circuit fabrication Grant 6,713,327 - Leedy March 30, 2 | 2004-03-30 |
| Lithography device for semiconductor circuit pattern generation Grant 6,714,625 - Leedy March 30, 2 | 2004-03-30 |
| Stress controlled dielectric integrated circuit fabrication Grant 6,682,981 - Leedy January 27, 2 | 2004-01-27 |
| Lithography device for semiconductor circuit pattern generator App 20030223535 - Leedy, Glenn Joseph | 2003-12-04 |
| Membrane IC fabrication App 20030057513 - Leedy, Glenn Joseph | 2003-03-27 |
| Membrane 3D IC fabrication App 20020045297 - Leedy, Glenn Joseph | 2002-04-18 |
| Method of making membrane integrated circuits App 20020014673 - Leedy, Glenn Joseph | 2002-02-07 |
| Electro-magnetic lithographic alignment method Grant 6,294,909 - Leedy September 25, 2 | 2001-09-25 |
| Membrane dielectric isolation IC fabrication Grant 6,020,257 - Leedy February 1, 2 | 2000-02-01 |
| Membrane dielectric isolation IC fabrication Grant 6,008,126 - Leedy December 28, 1 | 1999-12-28 |
| High density three-dimensional IC interconnection Grant 5,985,693 - Leedy November 16, 1 | 1999-11-16 |
| Membrane dielectric isolation IC fabrication Grant 5,946,559 - Leedy August 31, 1 | 1999-08-31 |
| Method of making dielectrically isolated integrated circuit Grant 5,869,354 - Leedy February 9, 1 | 1999-02-09 |
| Method of forming a multi-chip module from a membrane circuit Grant 5,834,334 - Leedy November 10, 1 | 1998-11-10 |
| Method of making a stacked 3D integrated circuit structure Grant 5,654,220 - Leedy August 5, 1 | 1997-08-05 |
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