Lee; Woo-Hyeong

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lee; Woo-Hyeong.The latest application filed is for "multiple patterning method for substrate".

Company Profile

0.16.18

Lee; Woo-Hyeong - Poughquag NY
Lee; Woo-Hyeong - New Providence NJ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Multiple Patterning Method For Substrate App 20170170016 - Lee; Woo-Hyeong ; et al.	2017-06-15
Method of forming transistor contacts Grant 9,171,758 - Chowdhury , et al. October 27, 2	2015-10-27
Method Of Forming Transistor Contacts App 20150279734 - Chowdhury; Murshed Mahmud ; et al.	2015-10-01
Stacking fault reduction in epitaxially grown silicon Grant 7,893,493 - Wang , et al. February 22, 2	2011-02-22
Compressive nitride film and method of manufacturing thereof Grant 7,851,376 - Yang , et al. December 14, 2	2010-12-14
Semiconductor substrate with multiple crystallographic orientations Grant 7,790,581 - Kim , et al. September 7, 2	2010-09-07
Method for improving semiconductor surfaces Grant 7,776,624 - Chakravarti , et al. August 17, 2	2010-08-17
Transistor having high mobility channel and methods Grant 7,682,887 - Dokumaci , et al. March 23, 2	2010-03-23
Stacking fault reduction in epitaxially grown silicon Grant 7,674,720 - Wang , et al. March 9, 2	2010-03-09
CMOS silicide metal gate integration Grant 7,655,557 - Amos , et al. February 2, 2	2010-02-02
Method For Improving Semiconductor Surfaces App 20100009524 - Chakravarti; Ashima B. ; et al.	2010-01-14
Compressive Nitride Film And Method Of Manufacturing Thereof App 20090137109 - Yang; Daewon ; et al.	2009-05-28
Compressive nitride film and method of manufacturing thereof Grant 7,514,370 - Yang , et al. April 7, 2	2009-04-07
Stacking Fault Reduction In Epitaxially Grown Silicon App 20080268609 - Wang; Yun-Yu ; et al.	2008-10-30
Strained HOT (hybrid orientation technology) MOSFETs Grant 7,439,110 - Cheng , et al. October 21, 2	2008-10-21
Cmos Silicide Metal Gate Integration App 20080254622 - Amos; Ricky S. ; et al.	2008-10-16
STRAINED HOT (HYBRID OREINTATION TECHNOLOGY) MOSFETs App 20080224216 - Cheng; Kangguo ; et al.	2008-09-18
CMOS silicide metal gate integration Grant 7,411,227 - Amos , et al. August 12, 2	2008-08-12
Semiconductor Substrate With Multiple Crystallographic Orientations App 20080185592 - Kim; Byeong Y. ; et al.	2008-08-07
Stacking Fault Reduction In Epitaxially Grown Silicon App 20080006876 - Wang; Yun-Yu ; et al.	2008-01-10
STRAINED HOT (HYBRID ORIENTATION TECHNOLOGY) MOSFETs App 20070269963 - Cheng; Kangguo ; et al.	2007-11-22
Compressive Nitride Film And Method Of Manufacturing Thereof App 20070269992 - Yang; Daewon ; et al.	2007-11-22
Polycrystalline silicon layer with nano-grain structure and method of manufacture Grant 7,232,774 - Chakravarti , et al. June 19, 2	2007-06-19
Transistor Having High Mobility Channel And Methods App 20070087540 - Dokumaci; Omer H. ; et al.	2007-04-19
Deposition of carbon and nitrogen doped poly silicon films, and retarded boron diffusion and improved poly depletion Grant 7,119,016 - Chakravarti , et al. October 10, 2	2006-10-10
CMOS silicide metal gate integration App 20060189061 - Amos; Ricky S. ; et al.	2006-08-24
Transistor Having High Mobility Channel And Methods App 20060166417 - Dokumaci; Omer H. ; et al.	2006-07-27
Chemical treatment to retard diffusion in a semiconductor overlayer Grant 7,071,103 - Chan , et al. July 4, 2	2006-07-04
CMOS silicide metal gate integration Grant 7,056,782 - Amos , et al. June 6, 2	2006-06-06
Chemical Treatment To Retard Diffusion In A Semiconductor Overlayer App 20060024934 - Chan; Kevin K. ; et al.	2006-02-02
CMOS silicide metal gate integration App 20050186747 - Amos, Ricky S. ; et al.	2005-08-25
Polycrystalline Silicon Layer With Nano-grain Structure and Method of Manufacture App 20050158924 - Chakravarti, Ashima B. ; et al.	2005-07-21
Deposition of carbon and nitrogen doped poly silicon films, and retarded boron diffusion and improved poly depletion App 20050085054 - Chakravarti, Ashima B. ; et al.	2005-04-21
Electronic components with doped metal oxide dielectric materials and a process for making electronic components with doped metal oxide dielectric materials Grant 5,923,056 - Lee , et al. July 13, 1	1999-07-13

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