loadpatents
name:-0.017048120498657
name:-0.015648126602173
name:-0.0065407752990723
Lee; Tien-Yu Patent Filings

Lee; Tien-Yu

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lee; Tien-Yu.The latest application filed is for "chip-scale led package structure".

Company Profile
6.14.13
  • Lee; Tien-Yu - San Jose CA
  • Lee; Tien-Yu - Taipei TW
  • LEE; TIEN-YU - TAIPEI CITY TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Stacked silicon package assembly having thermal management
Grant 11,355,412 - Gandhi , et al. June 7, 2
2022-06-07
Chip package assembly with enhanced solder resist crack resistance
Grant 11,315,858 - Sun , et al. April 26, 2
2022-04-26
Chip-scale LED package structure
Grant 11,257,795 - Lee , et al. February 22, 2
2022-02-22
Solder joints for board level reliability
Grant 10,930,611 - Gandhi , et al. February 23, 2
2021-02-23
Chip-scale Led Package Structure
App 20200235079 - LEE; TIEN-YU ;   et al.
2020-07-23
Light Emitting Package Structure And Method Of Manufacturing The Same
App 20200176648 - CHEN; CHIH-YUAN ;   et al.
2020-06-04
Stacked Silicon Package Assembly Having Thermal Management
App 20200105642 - Gandhi; Jaspreet Singh ;   et al.
2020-04-02
Methods and apparatus for thermal interface material (TIM) bond line thickness (BLT) reduction and TIM adhesion enhancement for efficient thermal management
Grant 10,529,645 - Gandhi , et al. J
2020-01-07
Testing system for lid-less integrated circuit packages
Grant 10,527,670 - Refai-Ahmed , et al. J
2020-01-07
Chip package assembly with enhanced interconnects and method for fabricating the same
Grant 10,319,606 - Gandhi , et al.
2019-06-11
Methods And Apparatus For Thermal Interface Material (tim) Bond Line Thickness (blt) Reduction And Tim Adhesion Enhancement For Efficient Thermal Management
App 20180358280 - Gandhi; Jaspreet Singh ;   et al.
2018-12-13
Method and apparatus for assembling and testing a multi-integrated circuit package
Grant 10,096,502 - Refai-Ahmed , et al. October 9, 2
2018-10-09
Testing System For Lid-less Integrated Circuit Packages
App 20180284187 - Refai-Ahmed; Gamal ;   et al.
2018-10-04
Stacked silicon package assembly having an enhanced lid
Grant 10,043,730 - Refai-Ahmed , et al. August 7, 2
2018-08-07
Method And Apparatus For Assembling And Testing A Multi-integrated Circuit Package
App 20180144963 - Refai-Ahmed; Gamal ;   et al.
2018-05-24
LED package structure
Grant 9,653,669 - Chen , et al. May 16, 2
2017-05-16
Stacked Silicon Package Assembly Having An Enhanced Lid
App 20170092619 - Refai-Ahmed; Gamal ;   et al.
2017-03-30
Led Package Structure
App 20160336498 - CHEN; CHIH-YUAN ;   et al.
2016-11-17
LED package structure and manufacturing method thereof
Grant 9,455,387 - Chen , et al. September 27, 2
2016-09-27
Led Package Structure And Manufacturing Method Thereof
App 20160260877 - CHEN; CHIH-YUAN ;   et al.
2016-09-08
Multi-use package substrate
Grant 9,204,542 - Lee , et al. December 1, 2
2015-12-01
Led Device
App 20120194067 - WU; CHIA-HAO ;   et al.
2012-08-02
LED device and packaging method thereof
Grant 8,216,864 - Wu , et al. July 10, 2
2012-07-10
Led Device And Packaging Method Thereof
App 20100276713 - WU; Chia-Hao ;   et al.
2010-11-04
Photoelectric Semiconductor Device
App 20100200879 - Lee; Tien-Yu ;   et al.
2010-08-12
Light emitting diode
Grant 7,741,651 - Wu , et al. June 22, 2
2010-06-22
Light emitting diode
App 20080272385 - Wu; Chia-Hao ;   et al.
2008-11-06

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