| Patent | Date |
|---|
Dual damascene process using metal hard mask
Grant 6,696,222 - Hsue , et al. February 24, 2 | 2004-02-24 |
Method for forming amino-free low k material
App 20040033703 - Lee, Shyh-Dar | 2004-02-19 |
Method For Improving Adhesion Of A Low K Dielectric To A Barrier Layer
App 20030228750 - Lee, Shyh-Dar ; et al. | 2003-12-11 |
Method to reduce reflectivity of polysilicon layer
App 20030219961 - Lee, Shyh-Dar | 2003-11-27 |
Method of forming a sealing layer on a copper pattern
App 20030219996 - Lee, Shyh-Dar | 2003-11-27 |
Method for improving adhesion of a low k dielectric to a barrier layer
Grant 6,649,512 - Lee , et al. November 18, 2 | 2003-11-18 |
Method of fabricating a dual damascene structure on a semiconductor substrate
App 20030170978 - Lee, Shyh-Dar | 2003-09-11 |
Capacitor with lower electrode located at the same level as an interconnect line
Grant 6,603,167 - Hsue , et al. August 5, 2 | 2003-08-05 |
Method of forming identifying mark on semiconductor wafer
App 20030141605 - Lee, Shyh-Dar ; et al. | 2003-07-31 |
Dual damascene process for improving planarization of an inter-metal dielectric layer
App 20030143835 - Lee, Shyh-Dar | 2003-07-31 |
Method of forming a liner in shallow trench isolation
App 20030129839 - Lee, Shyh-Dar ; et al. | 2003-07-10 |
Method of forming an oxide film with resistance to erosion caused by stripper
App 20030124809 - Lee, Shyh-Dar | 2003-07-03 |
Method of forming a polysilicon to polysilicon capacitor
App 20030124795 - Lee, Shyh-Dar | 2003-07-03 |
Method of fabricating shallow trench isolation
App 20030124813 - Lee, Shyh-Dar | 2003-07-03 |
Method of fabricating an IMD layer to improve global planarization in subsequent CMP
App 20030119301 - Hsue, Chen-Chiu ; et al. | 2003-06-26 |
Interconnect structure capped with a metallic barrier layer and method fabrication thereof
App 20030116826 - Hsue, Chen-Chiu ; et al. | 2003-06-26 |
Interconnect structure with a cap layer on an IMD layer and a method of formation thereof
App 20030075807 - Hsue, Chen-Chiu ; et al. | 2003-04-24 |
Organic copper diffusion barrier layer
App 20030067077 - Lee, Shyh-Dar | 2003-04-10 |
Dual damascene process using metal hard mask
App 20030044725 - Hsue, Chen-Chiu ; et al. | 2003-03-06 |
Process for preparing porous low dielectric constant material
App 20030044532 - Lee, Shyh-Dar ; et al. | 2003-03-06 |
Method for forming selective protection layers on copper interconnects
Grant 6,521,523 - Lee , et al. February 18, 2 | 2003-02-18 |
Interconnect structure manufacturing
App 20030008493 - Lee, Shyh-Dar | 2003-01-09 |
Selective barrier metal fabricated for interconnect structure manufacturing process
App 20030008495 - Hsue, Chen-Chiu ; et al. | 2003-01-09 |
Method For Forming A Metal Capacitor In A Damascene Process
App 20020192921 - Hsue, Chen-Chiu ; et al. | 2002-12-19 |
Method For Forming Selective Protection Layers On Copper Interconnects
App 20020192940 - Lee, Shyh-Dar ; et al. | 2002-12-19 |
Metal Capacitors With Damascene Structures
App 20020190386 - Hsue, Chen-Chiu ; et al. | 2002-12-19 |
Metal Capacitors With Damascene Structures And Method For Forming The Same
App 20020190300 - Hsue, Chen-Chiu ; et al. | 2002-12-19 |
Capacitor with lower electrode located at the same level as an interconnect line
App 20020190301 - Hsue, Chen-Chiu ; et al. | 2002-12-19 |
Metal Capacitor In Damascene Structures
App 20020190299 - Hsue, Chen-Chiu ; et al. | 2002-12-19 |
Method For Fabricating Polysilicon Capacitor
App 20020192922 - Hsue, Chen-Chiu ; et al. | 2002-12-19 |
Method for forming a metal capacitor in a damascene process
Grant 6,492,226 - Hsue , et al. December 10, 2 | 2002-12-10 |
Interconnect structure manufacturing process
App 20020182850 - Hsue, Chen-Chiu ; et al. | 2002-12-05 |
Method of forming void-free intermetal dielectrics
App 20020175145 - Lee, Shyh-Dar ; et al. | 2002-11-28 |
Method of forming a dual damascene opening using CVD Low-K material and spin-on-polymer
Grant 6,472,306 - Lee , et al. October 29, 2 | 2002-10-29 |
Dual damascene process using an oxide liner for a dielectric barrier layer
App 20020155695 - Lee, Shyh-Dar ; et al. | 2002-10-24 |
Method for forming a metal capacitor in a damascene process
Grant 6,410,386 - Hsue , et al. June 25, 2 | 2002-06-25 |
PECVD process for ULSI ARL
Grant 6,376,392 - Lee , et al. April 23, 2 | 2002-04-23 |
Method for fabricating metal capacitor
Grant 6,358,792 - Hsue , et al. March 19, 2 | 2002-03-19 |
Method for forming metal capacitors with a damascene process
Grant 6,338,999 - Hsue , et al. January 15, 2 | 2002-01-15 |
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