Lee; Michael Ju Hyeok

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lee; Michael Ju Hyeok.The latest application filed is for "volatile memory access via shared bitlines".

Company Profile

0.27.23

Lee; Michael Ju Hyeok - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Volatile memory access via shared bitlines Grant 9,042,149 - Lee , et al. May 26, 2	2015-05-26
Single-ended Volatile Memory Access App 20140098597 - Lee; Michael Ju Hyeok ; et al.	2014-04-10
Volatile Memory Access Via Shared Bitlines App 20140098590 - Lee; Michael Ju Hyeok ; et al.	2014-04-10
Volatile Memory Access Via Shared Bitlines App 20130141992 - Lee; Michael Ju Hyeok ; et al.	2013-06-06
Single-ended Volatile Memory Access App 20130141997 - Lee; Michael Ju Hyeok ; et al.	2013-06-06
Progamable control clock circuit for arrays Grant 7,936,198 - Sautter , et al. May 3, 2	2011-05-03
Array data input latch and data clocking scheme Grant 7,813,189 - Chan , et al. October 12, 2	2010-10-12
Information handling system with SRAM precharge power conservation Grant 7,804,728 - Lee , et al. September 28, 2	2010-09-28
Progamable Control Clock Circuit For Arrays App 20100164586 - Sautter; Rolf ; et al.	2010-07-01
Information Handling System with SRAM Precharge Power Conservation App 20100027361 - Lee; Michael Ju Hyeok ; et al.	2010-02-04
Array Data Input Latch and Data Clocking Scheme App 20100002525 - Chan; Yuen Hung ; et al.	2010-01-07
System and computer program for verifying performance of an array by simulating operation of edge cells in a full array model Grant 7,552,413 - Agarwal , et al. June 23, 2	2009-06-23
Transient noise detection scheme and apparatus Grant 7,506,230 - Chu , et al. March 17, 2	2009-03-17
Efficient muxing scheme to allow for bypass and array access Grant 7,466,647 - Bianchi , et al. December 16, 2	2008-12-16
System And Computer Program For Verifying Performance Of An Array By Simulating Operation Of Edge Cells In A Full Array Model App 20080270963 - Agarwal; Vikas ; et al.	2008-10-30
Method for verifying performance of an array by simulating operation of edge cells in a full array model Grant 7,424,691 - Agarwal , et al. September 9, 2	2008-09-09
Content addressable memory including a dual mode cycle boundary latch Grant 7,283,404 - Khan , et al. October 16, 2	2007-10-16
Scannable Domino Latch Redundancy For Soft Error Rate Protection With Collision Avoidance App 20070229132 - Chu; Sam Gat-Shang ; et al.	2007-10-04
Leakage sensing and keeper circuit for proper operation of a dynamic circuit Grant 7,202,704 - Chu , et al. April 10, 2	2007-04-10
Method and apparatus for controlling the timing of precharge in a content addressable memory system Grant 7,167,385 - Chan , et al. January 23, 2	2007-01-23
Register file method incorporating read-after-write blocking using detection cells Grant 7,142,463 - Chu , et al. November 28, 2	2006-11-28
Method and apparatus for selecting operating characteristics of a content addressable memory by using a compare mask Grant 7,116,569 - Hinojosa , et al. October 3, 2	2006-10-03
Multifunctional latch circuit for use with both SRAM array and self test device Grant 7,099,201 - Bianchi , et al. August 29, 2	2006-08-29
Method and apparatus for controlling the timing of precharge in a content addressable memory system App 20060181908 - Chan; Yuen Hung ; et al.	2006-08-17
Transient noise detection scheme and apparatus App 20060184852 - Chu; Sam Gat-Shang ; et al.	2006-08-17
Method And Apparatus For Selecting Operating Characteristics Of A Content Addressable Memory By Using A Compare Mask App 20060181909 - Hinojosa; Joaquin ; et al.	2006-08-17
Apparatus and method for detecting multiple hits in CAM arrays Grant 7,092,270 - Lee , et al. August 15, 2	2006-08-15
Dynamic-static logical control element for signaling an interval between the end of a control signal and a logical evaluation Grant 7,015,723 - Chu , et al. March 21, 2	2006-03-21
Register file apparatus and method incorporating read-after-write blocking using detection cells Grant 7,012,839 - Chu , et al. March 14, 2	2006-03-14
Register file method incorporating read-after-write blocking using detection cells App 20060039202 - Chu; Sam Gat-Shang ; et al.	2006-02-23
Register File Apparatus And Method Incorporating Read-after-write Blocking Using Detection Cells App 20060039203 - Chu; Sam Gat-Shang ; et al.	2006-02-23
Multilevel register-file bit-read method and apparatus Grant 7,002,860 - Chu , et al. February 21, 2	2006-02-21
Apparatus and method for detecting multiple hits in CAM arrays App 20060002163 - Lee; Michael Ju Hyeok ; et al.	2006-01-05
Latch circuit capable of ensuring race-free staging for signals in dynamic logic circuits Grant 6,960,941 - Cantin , et al. November 1, 2	2005-11-01
Latch Circuit Capable Of Ensuring Race-free Staging For Signals In Dynamic Logic Circuits App 20050206423 - Cantin, Jason Frederick ; et al.	2005-09-22
Reducing sub-threshold leakage in a memory array Grant 6,934,181 - Chu , et al. August 23, 2	2005-08-23
Register-file bit-read method and apparatus Grant 6,914,450 - Chu , et al. July 5, 2	2005-07-05
Multilevel register-file bit-read method and apparatus App 20050099851 - Chu, Sam Gat-Shang ; et al.	2005-05-12
Register-file Bit-read Method And Apparatus App 20050099205 - Chu, Sam Gat-Shang ; et al.	2005-05-12
Apparatus And Method For A Radiation Resistant Latch App 20040246782 - Chu, Sam Gat-Shang ; et al.	2004-12-09
Apparatus And Method For A Radiation Resistant Latch With Integrated Scan App 20040250184 - Chu, Sam Gat-Shang ; et al.	2004-12-09
Apparatus and method for a radiation resistant latch with integrated scan Grant 6,825,691 - Chu , et al. November 30, 2	2004-11-30
Apparatus and method for a radiation resistant latch Grant 6,826,090 - Chu , et al. November 30, 2	2004-11-30
Reducing sub-threshold leakage in a memory array App 20040156227 - Chu, Sam Gat-Shang ; et al.	2004-08-12
Sense amplifier and method for sensing signals in a silicon-on-insulator integrated circuit Grant 6,433,589 - Lee August 13, 2	2002-08-13
Generation of true and complement signals in dynamic circuits Grant 6,052,008 - Chu , et al. April 18, 2	2000-04-18
Dynamic MOS logic circuit without charge sharing noise Grant 6,002,271 - Chu , et al. December 14, 1	1999-12-14
Static-dynamic logic circuit Grant 5,852,373 - Chu , et al. December 22, 1	1998-12-22

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