loadpatents
name:-0.022939920425415
name:-0.026342868804932
name:-0.010156869888306
Lee; Liang-Yao Patent Filings

Lee; Liang-Yao

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lee; Liang-Yao.The latest application filed is for "different scaling ratio in feol / mol/ beol".

Company Profile
9.17.18
  • Lee; Liang-Yao - Taoyuan TW
  • Lee; Liang-Yao - Taoyuan City TW
  • Lee; Liang-Yao - Yaoyuan TW
  • Lee; Liang-Yao - Yaoyuan City TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Cell layout and structure
Grant 11,281,835 - Hsieh , et al. March 22, 2
2022-03-22
Different Scaling Ratio In Feol / Mol/ Beol
App 20220068812 - Lee; Liang-Yao ;   et al.
2022-03-03
Different scaling ratio in FEOL / MOL/ BEOL
Grant 11,152,303 - Lee , et al. October 19, 2
2021-10-19
Conductive line patterning
Grant 10,998,304 - Liu , et al. May 4, 2
2021-05-04
Cell Layout and Structure
App 20200257842 - Hsieh; Tung-Heng ;   et al.
2020-08-13
Cell layout and structure
Grant 10,664,639 - Hsieh , et al.
2020-05-26
Different Scaling Ratio In Feol / Mol/ Beol
App 20190287905 - Lee; Liang-Yao ;   et al.
2019-09-19
Conductive Line Patterning
App 20190244950 - Liu; Ru-Gun ;   et al.
2019-08-08
Semiconductor device and manufacturing method thereof
Grant 10,366,900 - Wu , et al. July 30, 2
2019-07-30
Different scaling ratio in FEOL/ MOL/ BEOL
Grant 10,325,849 - Lee , et al.
2019-06-18
Mask optimization for multi-layer contacts
Grant 10,283,495 - Liu , et al.
2019-05-07
Conductive line patterning
Grant 10,269,785 - Liu , et al.
2019-04-23
Cell Layout and Structure
App 20180253522 - Hsieh; Tung-Heng ;   et al.
2018-09-06
Cell layout and structure
Grant 9,984,191 - Hsieh , et al. May 29, 2
2018-05-29
Semiconductor Device And Manufacturing Method Thereof
App 20170278717 - WU; Juing-Yi ;   et al.
2017-09-28
Method for preventing photoresist corner rounding effects
Grant 9,746,783 - Lee , et al. August 29, 2
2017-08-29
Implant region definition
Grant 9,637,818 - Wu , et al. May 2, 2
2017-05-02
Conductive Line Patterning
App 20170025401 - Liu; Ru-Gun ;   et al.
2017-01-26
Semiconductor device having a metal gate
Grant 9,508,791 - Tsai , et al. November 29, 2
2016-11-29
Conductive line patterning
Grant 9,472,501 - Liu , et al. October 18, 2
2016-10-18
Mask Optimization For Multi-Layer Contacts
App 20160293590 - Liu; Ru-Gun ;   et al.
2016-10-06
Mask optimization for multi-layer contacts
Grant 9,391,056 - Liu , et al. July 12, 2
2016-07-12
Different Scaling Ratio In Feol / Mol/ Beol
App 20160155704 - Lee; Liang-Yao ;   et al.
2016-06-02
Semiconductor Device Having A Metal Gate
App 20160133693 - Tsai; Tsung-Chieh ;   et al.
2016-05-12
Different scaling ratio in FEOL / MOL/ BEOL
Grant 9,292,649 - Lee , et al. March 22, 2
2016-03-22
Cell Layout and Structure
App 20160063166 - Hsieh; Tung-Heng ;   et al.
2016-03-03
Conductive Line Patterning
App 20150333002 - Liu; Ru-Gun ;   et al.
2015-11-19
Implant Region Definition
App 20150322565 - Wu; Juing-Yi ;   et al.
2015-11-12
Conductive line patterning
Grant 9,136,168 - Liu , et al. September 15, 2
2015-09-15
Implant region definition
Grant 9,087,773 - Wu , et al. July 21, 2
2015-07-21
Different Scaling Ratio In Feol / Mol/ Beol
App 20150143319 - Lee; Liang-Yao ;   et al.
2015-05-21
Implant Region Definition
App 20150072480 - Wu; Juing-Yi ;   et al.
2015-03-12
Method For Preventing Photoresist Corner Rounding Effects
App 20150050810 - Lee; Liang-Yao ;   et al.
2015-02-19
Mask Optimization for Multi-Layer Contacts
App 20150048457 - Liu; Ru-Gun ;   et al.
2015-02-19
Conductive Line Patterning
App 20150001734 - Liu; Ru-Gun ;   et al.
2015-01-01

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