loadpatents
Patent applications and USPTO patent grants for Lee; Kuo-Hua.The latest application filed is for "reticle pod with quick-release support mechanism".
Patent | Date |
---|---|
Reticle Pod With Quick-release Support Mechanism App 20220238362 - Chiu; Ming-Chien ;   et al. | 2022-07-28 |
Substrate Container System App 20210323756 - CHIU; MING-CHIEN ;   et al. | 2021-10-21 |
Rotary-drum hydraulic-impact abrasion testing machine Grant 8,833,136 - Chang , et al. September 16, 2 | 2014-09-16 |
Rotary-Drum Hydraulic-Impact Abrasion Testing Machine App 20130327120 - Chang; Ta-Peng ;   et al. | 2013-12-12 |
Testing system and method thereof Grant 8,201,035 - Wang , et al. June 12, 2 | 2012-06-12 |
Chip testing circuit Grant 7,940,588 - Yuan , et al. May 10, 2 | 2011-05-10 |
Testing System And Method Thereof App 20100269001 - Wang; Shih-Hsing ;   et al. | 2010-10-21 |
Chip Testing Circuit App 20100171509 - YUAN; Der-Min ;   et al. | 2010-07-08 |
Integrated Circuit Fabrication App 20010013615 - LEE, KUO-HUA ;   et al. | 2001-08-16 |
Process for making bipolar having graded or modulated collector Grant 6,001,701 - Carroll , et al. December 14, 1 | 1999-12-14 |
Process for producing multi-level metallization in an integrated circuit Grant 5,956,618 - Liu , et al. September 21, 1 | 1999-09-21 |
Metal to metal capacitor apparatus and method for making Grant 5,903,493 - Lee May 11, 1 | 1999-05-11 |
FET with gate spacer Grant 5,679,589 - Lee , et al. October 21, 1 | 1997-10-21 |
Thin film transistor having increased effective channel width Grant 5,656,822 - Lee , et al. August 12, 1 | 1997-08-12 |
Integrated circuit fabrication having contact opening Grant 5,654,240 - Lee , et al. August 5, 1 | 1997-08-05 |
Complementary TFT devices with diode-effect elimination means independent of TFT-channel geometry Grant 5,625,200 - Lee , et al. April 29, 1 | 1997-04-29 |
Integrated circuit fabrication with interlevel dielectric Grant 5,559,052 - Lee , et al. September 24, 1 | 1996-09-24 |
High-speed high-density SRAM cell Grant 5,521,861 - Lee , et al. May 28, 1 | 1996-05-28 |
Integrated circuit fabrication Grant 5,468,669 - Lee , et al. November 21, 1 | 1995-11-21 |
Method of fabricating gate stack having a reduced height Grant 5,438,006 - Chang , et al. August 1, 1 | 1995-08-01 |
Transistor gate formation Grant 5,431,770 - Lee , et al. July 11, 1 | 1995-07-11 |
Method of manufacturing shallow junction field effect transistor Grant 5,395,787 - Lee , et al. March 7, 1 | 1995-03-07 |
Method of making severable conductive path in an integrated-circuit device Grant 5,185,291 - Fischer , et al. February 9, 1 | 1993-02-09 |
FET with gate spacer Grant 5,153,145 - Lee , et al. October 6, 1 | 1992-10-06 |
Integrated circuit Grant 5,128,738 - Lee , et al. July 7, 1 | 1992-07-07 |
Severable conductive path in an integrated-circuit device Grant 5,066,998 - Fischer , et al. November 19, 1 | 1991-11-19 |
Integrated-circuit device isolation Grant 5,002,898 - Fritzinger , et al. March 26, 1 | 1991-03-26 |
Semiconductor device manufacture including trench formation Grant 4,952,524 - Lee , et al. August 28, 1 | 1990-08-28 |
Making silicide gate level runners Grant 4,935,376 - Hillenius , et al. June 19, 1 | 1990-06-19 |
Integrated circuits having stepped dielectric regions Grant 4,676,869 - Lee , et al. June 30, 1 | 1987-06-30 |
Metalization process for headless contact using deposited smoothing material Grant 4,641,420 - Lee February 10, 1 | 1987-02-10 |
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