Lee; Jong Seuk

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lee; Jong Seuk.The latest application filed is for "structure and method for testing three-dimensional memory device".

Company Profile

4.13.6

Lee; Jong Seuk - Hubei CN
LEE; Jong Seuk - Wuhan CN
Lee; Jong Seuk - Pal Alto CA
Lee; Jong Seuk - Palo Alto CA
Lee; Jong Seuk - Kyungki-do KR
Lee; Jong Seuk - Yongin-shi KR
Lee; Jong Seuk - Kgouriggido KR
Lee; Jong Seuk - Seongnan KR
Lee; Jong Seuk - Kyoungki-do KR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Structure and method for testing three-dimensional memory device Grant 10,998,079 - Kim , et al. May 4, 2	2021-05-04
Structure And Method For Testing Three-dimensional Memory Device App 20200265913 - KIM; Jong Jun ; et al.	2020-08-20
Structure and method for testing three-dimensional memory device Grant 10,679,721 - Kim , et al.	2020-06-09
Structure And Method For Testing Three-dimensional Memory Device App 20190057756 - Kim; Jong Jun ; et al.	2019-02-21
Serial flash semiconductor memory App 20100049948 - Jigour; Robin J. ; et al.	2010-02-25
Serial flash semiconductor memory Grant 7,558,900 - Jigour , et al. July 7, 2	2009-07-07
Serial flash semiconductor memory App 20060067123 - Jigour; Robin J. ; et al.	2006-03-30
Virtual ground single transistor memory cell, memory array incorporating same, and method of operation thereof Grant 6,873,004 - Han , et al. March 29, 2	2005-03-29
Virtual ground nonvolatile semiconductor memory array architecture and integrated circuit structure therefor Grant 6,826,080 - Park , et al. November 30, 2	2004-11-30
Threshold voltage convergence Grant 6,728,140 - Han , et al. April 27, 2	2004-04-27
Virtual ground nonvolatile semiconductor memory array architecture and integrated circuit structure therefor App 20030218908 - Park, Joo Weon ; et al.	2003-11-27
Threshold voltage convergence App 20030103381 - Han, Kyung Joon ; et al.	2003-06-05
Multistep pulse generation circuit and method of erasing a flash memory cell using the same Grant 6,279,070 - Jeong , et al. August 21, 2	2001-08-21
Drain voltage pumping circuit Grant 6,208,198 - Lee March 27, 2	2001-03-27
Non-volatile memory structure Grant 6,084,798 - Lee July 4, 2	2000-07-04
Erasing circuit for a flash memory device having a triple well structure Grant 6,052,305 - Yang , et al. April 18, 2	2000-04-18
Flash memory device having word line latch for multi-bit programming Grant 5,946,233 - Kim , et al. August 31, 1	1999-08-31
Nonvolatile memory interface protocol which selects a memory device, transmits an address, deselects the device, subsequently reselects the device and accesses data Grant 5,920,884 - Jennings, III , et al. July 6, 1	1999-07-06
Method for programming and erasing a memory cell of a flash memory device Grant 5,894,438 - Yang , et al. April 13, 1	1999-04-13

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