Lee; Jong Duk

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lee; Jong Duk.The latest application filed is for "semiconductor controlled rectifiers for electrostatic discharge protection".

Company Profile

0.8.7

Lee; Jong Duk - Seoul KR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Charge trap memory with avalanche generation inducing layer Grant 7,615,821 - Sim , et al. November 10, 2	2009-11-10
Dual-gate dynamic random access memory device having vertical channel transistors and method of fabricating the same Grant 7,564,084 - Song , et al. July 21, 2	2009-07-21
Twin-ONO-type SONOS memory Grant 7,511,334 - Lee , et al. March 31, 2	2009-03-31
Silicon/oxide/nitride/silicon nonvolatile memory with vertical channels Grant 7,439,574 - Kim , et al. October 21, 2	2008-10-21
Semiconductor controlled rectifiers for electrostatic discharge protection App 20070069310 - Song; Ki-Whan ; et al.	2007-03-29
Dual-gate dynamic random access memory device having vertical channel transistors and method of fabricating the same App 20070051994 - Song; Ki-Whan ; et al.	2007-03-08
Charge trap memory cell with multi-doped layers, flash memory array using the memory cell and operating method of the same App 20060171209 - Sim; Jae Sung ; et al.	2006-08-03
Twin-ONO-type SONOS memory App 20060086953 - Lee; Yong-kyu ; et al.	2006-04-27
Method of manufacturing twin-ONO-type SONOS memory using reverse self-alignment process Grant 7,005,349 - Lee , et al. February 28, 2	2006-02-28
Method of manufacturing twin-ONO-type SONOS memory using reverse self-alignment process App 20040197995 - Lee, Yong-kyu ; et al.	2004-10-07
Method for fabricating semiconductor device with negative differential conductance or transconductance Grant 6,800,511 - Park , et al. October 5, 2	2004-10-05
Silicon/oxide/nitride/oxide/silicon nonvolatile memory with vertical channels, fabricating method thereof, and programming method thereof App 20040097044 - Kim, Chung-woo ; et al.	2004-05-20
Method for fabricating semiconductor device with negative differential conductance or transconductance App 20040097023 - Park, Byung Gook ; et al.	2004-05-20
Method for manufacturing ISRC MOSFET Grant 5,747,356 - Lee , et al. May 5, 1	1998-05-05

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