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name:-0.018989086151123
name:-0.014621019363403
name:-0.0013618469238281
Lee; Jih-Nung Patent Filings

Lee; Jih-Nung

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lee; Jih-Nung.The latest application filed is for "electronic apparatus and control method thereof".

Company Profile
0.17.17
  • Lee; Jih-Nung - Hsinchu County TW
  • Lee; Jih-Nung - Hsin Chu County TW
  • Lee; Jih-Nung - Hsinchu TW
  • Lee; Jih-Nung - Hsinchu City TW
  • Lee; Jih-Nung - Taipei City TW
  • Lee; Jih-Nung - US
  • Lee, Jih-Nung - Taipei TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Integrated circuit test method
Grant 10,496,505 - Hsu , et al. De
2019-12-03
Electronic apparatus and control method thereof
Grant 10,416,233 - Kuo , et al. Sept
2019-09-17
Debugging method executed via scan chain for scan test and related circuitry system
Grant 10,234,503 - Kuo , et al.
2019-03-19
Electronic Apparatus And Control Method Thereof
App 20180210029 - KUO; Chun-Yi ;   et al.
2018-07-26
Integrated Circuit Test Method
App 20180181477 - HSU; WEN-HSUAN ;   et al.
2018-06-28
Voltage And Frequency Scaling Apparatus, System On Chip And Voltage And Frequency Scaling Method
App 20180052506 - KUO; Chun-Yi ;   et al.
2018-02-22
Debugging Method Executed Via Scan Chain For Scan Test And Related Circuitry System
App 20170176522 - Kuo; Chun-Yi ;   et al.
2017-06-22
Method of integrated circuit scan clock domain allocation and machine readable media thereof
Grant 9,568,553 - Wu , et al. February 14, 2
2017-02-14
Estimation apparatus and method for estimating clock skew
Grant 9,274,543 - Chen , et al. March 1, 2
2016-03-01
Clock edge detection device and method
Grant 9,160,322 - Lo , et al. October 13, 2
2015-10-13
Test system which shares a register in different modes
Grant 8,984,354 - Kuo , et al. March 17, 2
2015-03-17
Clock edge detection device and method
App 20150022242 - LO; Yu-Cheng ;   et al.
2015-01-22
Delay difference detection and adjustment device and method
Grant 8,907,709 - Lo , et al. December 9, 2
2014-12-09
Element measurement circuit and method thereof
Grant 8,901,917 - Chen , et al. December 2, 2
2014-12-02
Scan Clock Generator And Related Method Thereof
App 20140129885 - Chen; Ying-Yen ;   et al.
2014-05-08
Method Of Integrated Circuit Scan Clock Domain Allocation And Machine Readable Media Thereof
App 20140091812 - Wu; Ming-Chung ;   et al.
2014-04-03
Memory apparatus and testing method thereof
Grant 8,572,444 - Lee , et al. October 29, 2
2013-10-29
Estimation Apparatus And Method For Estimating Clock Skew
App 20130282318 - Chen; Ying-Yen ;   et al.
2013-10-24
Memory with self-test function and method for testing the same
Grant 8,479,060 - Kuo , et al. July 2, 2
2013-07-02
Configurable Process Variation Monitoring Circuit of Die and Monitoring Method Thereof
App 20120326701 - CHEN; YING-YEN ;   et al.
2012-12-27
Test System
App 20120304032 - Kuo; Shuo-Fen ;   et al.
2012-11-29
Element Measurement Circuit And Method Thereof
App 20120274310 - CHEN; Ying-Yen ;   et al.
2012-11-01
Memory with Self-Test Function and Method for Testing the Same
App 20110179323 - Kuo; Shuo-Fen ;   et al.
2011-07-21
Microelectronic device and pin arrangement method thereof
Grant 7,949,919 - Wu , et al. May 24, 2
2011-05-24
Memory Apparatus And Testing Method Thereof
App 20100235695 - Lee; Jih-Nung ;   et al.
2010-09-16
Memory Device And Test Method Thereof
App 20090265592 - Wu; Hsiang-Huang ;   et al.
2009-10-22
Microelectronic device and pin arrangement method thereof
App 20090106611 - Wu; Hsiang-Huang ;   et al.
2009-04-23
Method and system of fault patterns oriented defect diagnosis for memories
App 20040233767 - Wu, Cheng-Wen ;   et al.
2004-11-25

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