loadpatents
name:-0.02192497253418
name:-0.0065510272979736
name:-0.0053081512451172
Lee; Hyuekjae Patent Filings

Lee; Hyuekjae

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lee; Hyuekjae.The latest application filed is for "semiconductor package and method of manufacturing the same".

Company Profile
5.8.19
  • Lee; Hyuekjae - Hwaseong-si KR
  • Lee; Hyuekjae - Hwasung N/A KR
  • Lee; Hyuekjae - Suwon-si N/A KR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor package including underfill material layer and method of forming the same
Grant 11,404,395 - Hwang , et al. August 2, 2
2022-08-02
Semiconductor Package And Method Of Manufacturing The Same
App 20220208649 - Oh; Seungyeol ;   et al.
2022-06-30
Die-to-wafer Bonding Structure And Semiconductor Package Using The Same
App 20220181285 - Hong; Jiseok ;   et al.
2022-06-09
Semiconductor Package
App 20220165722 - PARK; Sang Cheon ;   et al.
2022-05-26
Semiconductor Package
App 20220139880 - Lee; Hyuekjae ;   et al.
2022-05-05
Integrated Circuit Chip Having Bs-pdn Structure
App 20220139863 - Song; Eunseok ;   et al.
2022-05-05
Semiconductor Package
App 20220139874 - LEE; Sanghoon ;   et al.
2022-05-05
Semiconductor Package Having Stacked Semiconductor Chips
App 20220130801 - LEE; Hyuekjae ;   et al.
2022-04-28
Die-to-wafer bonding structure and semiconductor package using the same
Grant 11,289,438 - Hong , et al. March 29, 2
2022-03-29
Semiconductor Packages And Methods Of Manufacturing The Same
App 20220068863 - HONG; JISEOK ;   et al.
2022-03-03
Semiconductor package having stacked semiconductor chips
Grant 11,244,927 - Lee , et al. February 8, 2
2022-02-08
Semiconductor Package
App 20220028834 - LEE; HYUEKJAE ;   et al.
2022-01-27
Packaged Multi-chip Semiconductor Devices And Methods Of Fabricating Same
App 20210358875 - Lee; Hyuekjae ;   et al.
2021-11-18
Semiconductor packages having improved reliability in bonds between connection conductors and pads
Grant 11,158,594 - Hong , et al. October 26, 2
2021-10-26
Semiconductor Package Including Underfill Material Layer And Method Of Forming The Same
App 20210151410 - HWANG; Jihwan ;   et al.
2021-05-20
Semiconductor Packages And Methods Of Manufacturing The Same
App 20210143116 - HONG; JISEOK ;   et al.
2021-05-13
Stacked Semiconductor Package
App 20210125955 - SUH; JIHWAN ;   et al.
2021-04-29
Die-to-wafer Bonding Structure And Semiconductor Package Using The Same
App 20210104482 - Hong; Jiseok ;   et al.
2021-04-08
Semiconductor Package Having Stacked Semiconductor Chips
App 20210028152 - LEE; Hyuekjae ;   et al.
2021-01-28
Semiconductor Package And A Method For Manufacturing The Same
App 20210028146 - LEE; HYUEKJAE ;   et al.
2021-01-28
Substrate Treating Apparatus And A Method For Treating A Substrate
App 20160314996 - KIM; IL HWAN ;   et al.
2016-10-27
Method for wafer level package and semiconductor device fabricated using the same
Grant 8,558,371 - Hong , et al. October 15, 2
2013-10-15
Microelectronic devices including conductive vias, conductive caps and variable thickness insulating layers
Grant 8,399,987 - Kwon , et al. March 19, 2
2013-03-19
Method For Wafer Level Package and Semiconductor Device Fabricated Using The Same
App 20110233706 - Hong; JiSun ;   et al.
2011-09-29
Microelectronic Devices Including Conductive Vias, Conductive Caps And Variable Thickness Insulating Layers, And Methods Of Fabricating Same
App 20110133333 - Kwon; Woonseong ;   et al.
2011-06-09

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed