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Patent applications and USPTO patent grants for Lee; Hsiao-Chun.The latest application filed is for "semiconductor device and method fabricating the same".
Patent | Date |
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Semiconductor device and method fabricating the same Grant 10,020,251 - Lee , et al. July 10, 2 | 2018-07-10 |
Semiconductor Device and Method Fabricating the Same App 20170373002 - Lee; Hsiao-Chun ;   et al. | 2017-12-28 |
Through Substrate Via Structure For Noise Reduction App 20170358493 - FANG; Chun-Lin ;   et al. | 2017-12-14 |
Through substrate via structure for noise reduction Grant 9,842,774 - Fang , et al. December 12, 2 | 2017-12-12 |
Bipolar junction transistor layout Grant 9,780,089 - Tsai , et al. October 3, 2 | 2017-10-03 |
Semiconductor device and method fabricating the same Grant 9,768,112 - Lee , et al. September 19, 2 | 2017-09-19 |
Semiconductor device with guard ring coupled resonant circuit Grant 9,705,466 - Chen , et al. July 11, 2 | 2017-07-11 |
Bipolar Junction Transistor Layout App 20170047323 - TSAI; Han-Min ;   et al. | 2017-02-16 |
Bipolar junction transistor layout Grant 9,484,408 - Tsai , et al. November 1, 2 | 2016-11-01 |
Semiconductor Device and Method Fabricating the Same App 20160307841 - LEE; HSIAO-CHUN ;   et al. | 2016-10-20 |
Semiconductor Device With Guard Ring Coupled Resonant Circuit App 20160248394 - CHEN; Yen-Jen ;   et al. | 2016-08-25 |
Semiconductor device and method fabricating the same Grant 9,406,626 - Lee , et al. August 2, 2 | 2016-08-02 |
Semiconductor Device And Method Fabricating The Same App 20150333019 - LEE; HSIAO-CHUN ;   et al. | 2015-11-19 |
Dual DNW isolation structure for reducing RF noise on high voltage semiconductor devices Grant 8,921,978 - Huang , et al. December 30, 2 | 2014-12-30 |
Structure and Method for an Inductor With Metal Dummy Features App 20140252542 - Lee; Hsiao-Chun ;   et al. | 2014-09-11 |
Dual Dnw Isolation Structure For Reducing Rf Noise On High Voltage Semiconductor Devices App 20130175655 - HUANG; Chi-Feng ;   et al. | 2013-07-11 |
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