Lee; Hsiang-Huan
Patent Applications and Registrations
Patent applications and USPTO patent grants for Lee; Hsiang-Huan.The latest application filed is for "selective formation of conductor nanowires".
Company Profile
4.69.73
- Lee; Hsiang-Huan - Hsinchu County TW
- Lee; Hsiang-Huan - Jhudong Township TW
- Lee; Hsiang-Huan - Hsinchu TW
- Lee; Hsiang-Huan - Jhodong Township TW
- Lee; Hsiang-Huan - Jhudong Township, Hsinchu County N/A TW
- Lee; Hsiang-Huan - Jhudong TW
Patent Activity
| Patent | Date |
|---|---|
| Method of semiconductor integrated circuit fabrication Grant 10,930,552 - Yeh , et al. February 23, 2 | 2021-02-23 |
| Selective Formation of Conductor Nanowires App 20200091068 - Peng; Chao-Hsien ; et al. | 2020-03-19 |
| Method of Semiconductor Integrated Circuit Fabrication App 20200051857 - Yeh; Ching-Fu ; et al. | 2020-02-13 |
| Selective formation of conductor nanowires Grant 10,490,497 - Peng , et al. Nov | 2019-11-26 |
| Method of semiconductor integrated circuit fabrication Grant 10,453,746 - Yeh , et al. Oc | 2019-10-22 |
| Copper etching integration scheme Grant 10,354,954 - Lu , et al. July 16, 2 | 2019-07-16 |
| Method of manufacturing a semiconductor device Grant 10,121,698 - Lee , et al. November 6, 2 | 2018-11-06 |
| Copper Etching Integration Scheme App 20180301416 - Lu; Chih-Wei ; et al. | 2018-10-18 |
| Method of Semiconductor Integrated Circuit Fabrication App 20180233406 - Yeh; Ching-Fu ; et al. | 2018-08-16 |
| Copper etching integration scheme Grant 10,020,259 - Lu , et al. July 10, 2 | 2018-07-10 |
| Lithography using high selectivity spacers for pitch reduction Grant 10,014,175 - Chang , et al. July 3, 2 | 2018-07-03 |
| Method of semiconductor integrated circuit fabrication Grant 9,947,583 - Yeh , et al. April 17, 2 | 2018-04-17 |
| Lithography using multilayer spacer for reduced spacer footing Grant 9,892,933 - Peng , et al. February 13, 2 | 2018-02-13 |
| Lithography Using High Selectivity Spacers for Pitch Reduction App 20180012761 - Chang; Yu-Sheng ; et al. | 2018-01-11 |
| Method of forming an interconnection Grant 9,842,767 - Lee , et al. December 12, 2 | 2017-12-12 |
| Method of manufacturing a semiconductor device Grant 9,837,310 - Peng , et al. December 5, 2 | 2017-12-05 |
| Interconnect structure and manufacturing method thereof Grant 9,818,644 - Yang , et al. November 14, 2 | 2017-11-14 |
| Lithography using high selectivity spacers for pitch reduction Grant 9,773,676 - Chang , et al. September 26, 2 | 2017-09-26 |
| Method for Via Plating with Seed Layer App 20170236750 - Yang; Shin-Yi ; et al. | 2017-08-17 |
| Via pre-fill on back-end-of-the-line interconnect layer Grant 9,728,503 - Peng , et al. August 8, 2 | 2017-08-08 |
| Copper Etching Integration Scheme App 20170194258 - Lu; Chih-Wei ; et al. | 2017-07-06 |
| Method of Semiconductor Integrated Circuit Fabrication App 20170170066 - Yeh; Ching-Fu ; et al. | 2017-06-15 |
| Method for forming interconnect structure that avoids via recess Grant 9,646,932 - Peng , et al. May 9, 2 | 2017-05-09 |
| Semiconductor Device Metallization Systems and Methods App 20170125290 - Lee; Hsiang-Huan ; et al. | 2017-05-04 |
| Method for via plating with seed layer Grant 9,640,431 - Yang , et al. May 2, 2 | 2017-05-02 |
| Copper etching integration scheme Grant 9,633,949 - Lu , et al. April 25, 2 | 2017-04-25 |
| Method and apparatus for back end of line semiconductor device processing Grant 9,613,854 - Yang , et al. April 4, 2 | 2017-04-04 |
| Aluminum interconnection apparatus Grant 9,607,891 - Yeh , et al. March 28, 2 | 2017-03-28 |
| Conductive element structure and method Grant 9,595,471 - Yang , et al. March 14, 2 | 2017-03-14 |
| Method of semiconductor integrated circuit fabrication Grant 9,570,347 - Yeh , et al. February 14, 2 | 2017-02-14 |
| Semiconductor device metallization systems and methods Grant 9,548,241 - Lee , et al. January 17, 2 | 2017-01-17 |
| Conductive Element Structure and Method App 20160358817 - Yang; Tai-I ; et al. | 2016-12-08 |
| Interconnect having air gaps and polymer wrapped conductive lines Grant 9,496,170 - Yang , et al. November 15, 2 | 2016-11-15 |
| Integrated circuit interconnects and methods of making same Grant 9,490,205 - Tsai , et al. November 8, 2 | 2016-11-08 |
| Semiconductor devices and methods of manufacture thereof Grant 9,484,302 - Yang , et al. November 1, 2 | 2016-11-01 |
| Aluminum interconnection apparatus Grant 9,455,184 - Yeh , et al. September 27, 2 | 2016-09-27 |
| Copper Etching Integration Scheme App 20160254225 - Lu; Chih-Wei ; et al. | 2016-09-01 |
| Conductive element structure and method Grant 9,425,089 - Yang , et al. August 23, 2 | 2016-08-23 |
| Method for Via Plating with Seed Layer App 20160240434 - Yang; Shin-Yi ; et al. | 2016-08-18 |
| Interconnect Structure And Manufacturing Method Thereof App 20160218035 - YANG; SHIN-YI ; et al. | 2016-07-28 |
| Method for forming recess-free interconnect structure Grant 9,385,029 - Peng , et al. July 5, 2 | 2016-07-05 |
| Semiconductor Device Metallization Systems and Methods App 20160181152 - Lee; Hsiang-Huan ; et al. | 2016-06-23 |
| Copper etching integration scheme Grant 9,373,586 - Lu , et al. June 21, 2 | 2016-06-21 |
| Interconnect Having Air Gaps and Polymer Wrapped Conductive Lines App 20160172232 - Yang; Shin-Yi ; et al. | 2016-06-16 |
| Method for Forming Interconnect Structure that Avoids via Recess App 20160148874 - Peng; Chao-Hsien ; et al. | 2016-05-26 |
| Dual damascene gap filling process Grant 9,343,400 - Lee , et al. May 17, 2 | 2016-05-17 |
| Back end of the line (BEOL) interconnect scheme Grant 9,343,356 - Kuo , et al. May 17, 2 | 2016-05-17 |
| System and method for chemical-mechanical planarization of a metal layer Grant 9,330,989 - Wu , et al. May 3, 2 | 2016-05-03 |
| Method for via plating with seed layer Grant 9,324,608 - Yang , et al. April 26, 2 | 2016-04-26 |
| Semiconductor device metallization systems and methods Grant 9,318,364 - Lee , et al. April 19, 2 | 2016-04-19 |
| Interconnect structure and manufacturing method thereof Grant 9,318,439 - Yang , et al. April 19, 2 | 2016-04-19 |
| Interconnect structure including a continuous conductive body Grant 9,281,263 - Lee , et al. March 8, 2 | 2016-03-08 |
| Integrated circuit formed using spacer-like copper deposition Grant 9,275,960 - Yao , et al. March 1, 2 | 2016-03-01 |
| Interconnect having air gaps and polymer wrapped conductive lines Grant 9,269,668 - Yang , et al. February 23, 2 | 2016-02-23 |
| Via Pre-fill On Back-end-of-the-line Interconnect Layer App 20160049373 - Peng; Chao-Hsien ; et al. | 2016-02-18 |
| Lithography Using High Selectivity Spacers for Pitch Reduction App 20160035571 - Chang; Yu-Sheng ; et al. | 2016-02-04 |
| Method for forming interconnect structure that avoids via recess Grant 9,252,049 - Peng , et al. February 2, 2 | 2016-02-02 |
| Lithography using Multilayer Spacer for Reduced Spacer Footing App 20160027658 - Peng; Chao-Hsien ; et al. | 2016-01-28 |
| Interconnect Having Air Gaps And Polymer Wrapped Conductive Lines App 20160020176 - Yang; Shin-Yi ; et al. | 2016-01-21 |
| Method and Apparatus for Back End of Line Semiconductor Device Processing App 20160005648 - Yang; Shin-Yi ; et al. | 2016-01-07 |
| Conductive Element Structure And Method App 20150380303 - Yang; Tai-I ; et al. | 2015-12-31 |
| Via pre-fill on back-end-of-the-line interconnect layer Grant 9,219,033 - Peng , et al. December 22, 2 | 2015-12-22 |
| Aluminum Interconnection Apparatus App 20150364370 - Yeh; Ching-Fu ; et al. | 2015-12-17 |
| Selective Formation of Conductor Nanowires App 20150364413 - Peng; Chao-Hsien ; et al. | 2015-12-17 |
| Lithography using high selectivity spacers for pitch reduction Grant 9,177,797 - Chang , et al. November 3, 2 | 2015-11-03 |
| Lithography using multilayer spacer for reduced spacer footing Grant 9,159,579 - Peng , et al. October 13, 2 | 2015-10-13 |
| Interconnect Structure And Manufacturing Method Thereof App 20150270225 - YANG; SHIN-YI ; et al. | 2015-09-24 |
| Method of Semiconductor Integrated Circuit Fabrication App 20150270170 - Yeh; Ching-Fu ; et al. | 2015-09-24 |
| Via Pre-fill On Back-end-of-the-line Interconnect Layer App 20150270215 - Peng; Chao-Hsien ; et al. | 2015-09-24 |
| Copper interconnect structure and method for forming the same Grant 9,142,509 - Yu , et al. September 22, 2 | 2015-09-22 |
| Method and apparatus for back end of line semiconductor device processing Grant 9,142,505 - Yang , et al. September 22, 2 | 2015-09-22 |
| Integrated Circuit Interconnects and Methods of Making Same App 20150255389 - Tsai; Cheng-Hsiung ; et al. | 2015-09-10 |
| Method for Via Plating with Seed Layer App 20150255334 - Yang; Shin-Yi ; et al. | 2015-09-10 |
| Interconnect Structures Comprising Flexible Buffer Layers App 20150214102 - Peng; Chao-Hsien ; et al. | 2015-07-30 |
| Interconnection wires of semiconductor devices Grant 9,093,501 - Singh , et al. July 28, 2 | 2015-07-28 |
| Semiconductor Device Metallization Systems and Methods App 20150197849 - Lee; Hsiang-Huan ; et al. | 2015-07-16 |
| Semiconductor Devices and Methods of Manufacture Thereof App 20150200164 - Yang; Shin-Yi ; et al. | 2015-07-16 |
| Method for via plating with seed layer Grant 9,054,163 - Yang , et al. June 9, 2 | 2015-06-09 |
| Method of semiconductor integrated circuit fabrication Grant 9,054,161 - Yeh , et al. June 9, 2 | 2015-06-09 |
| Lithography Using High Selectivity Spacers for Pitch Reduction App 20150155171 - Chang; Yu-Sheng ; et al. | 2015-06-04 |
| Method for Forming Recess-Free Interconnect Structure App 20150145134 - Peng; Chao-Hsien ; et al. | 2015-05-28 |
| Integrated circuit interconnects and methods of making same Grant 9,034,756 - Tsai , et al. May 19, 2 | 2015-05-19 |
| Method Of Manufacturing A Semiconductor Device App 20150132947 - Peng; Chao-Hsien ; et al. | 2015-05-14 |
| Interconnect structures comprising flexible buffer layers Grant 9,030,013 - Peng , et al. May 12, 2 | 2015-05-12 |
| Method for Via Plating with Seed Layer App 20150126030 - Yang; Shin-Yi ; et al. | 2015-05-07 |
| Lithography using Multilayer Spacer for Reduced Spacer Footing App 20150118850 - Peng; Chao-Hsien ; et al. | 2015-04-30 |
| Semiconductor devices and methods of manufacture thereof Grant 9,006,095 - Yang , et al. April 14, 2 | 2015-04-14 |
| Copper interconnect structure and method for forming the same Grant 8,941,239 - Yu , et al. January 27, 2 | 2015-01-27 |
| Method Of Semiconductor Integrated Circuit Fabrication App 20150017799 - Lee; Ming-Han ; et al. | 2015-01-15 |
| Method of fabricating copper damascene Grant 8,916,469 - Peng , et al. December 23, 2 | 2014-12-23 |
| Method and Apparatus for Back End of Line Semiconductor Device Processing App 20140367857 - Yang; Shin-Yi ; et al. | 2014-12-18 |
| Method for forming recess-free interconnect structure Grant 8,912,041 - Peng , et al. December 16, 2 | 2014-12-16 |
| Copper Interconnect Structure And Method For Forming The Same App 20140327141 - YU; Chen-Hua ; et al. | 2014-11-06 |
| Interconnection Wires of Semiconductor Devices App 20140315382 - Singh; Sunil Kumar ; et al. | 2014-10-23 |
| Aluminum Interconnection Apparatus App 20140295663 - Yeh; Ching-Fu ; et al. | 2014-10-02 |
| Method Of Fabricating Copper Damascene App 20140273434 - Peng; Chao-Hsien ; et al. | 2014-09-18 |
| Dual Damascene Gap Filling Process App 20140264908 - Lee; Hsiang-Huan ; et al. | 2014-09-18 |
| Method of semiconductor integrated circuit fabrication Grant 8,835,304 - Lu , et al. September 16, 2 | 2014-09-16 |
| Method For Forming Interconnect Structure That Avoids Via Recess App 20140252618 - Peng; Chao-Hsien ; et al. | 2014-09-11 |
| Method for Forming Recess-Free Interconnect Structure App 20140252622 - Peng; Chao-Hsien ; et al. | 2014-09-11 |
| Semiconductor Devices and Methods of Manufacture Thereof App 20140235049 - Yang; Shin-Yi ; et al. | 2014-08-21 |
| Back End of the Line (BEOL) Interconnect Scheme App 20140231998 - Kuo; Chi-Liang ; et al. | 2014-08-21 |
| Method of Semiconductor Integrated Circuit Fabrication App 20140235050 - Yeh; Ching-Fu ; et al. | 2014-08-21 |
| Interconnect Structure Including A Continuous Conductive Body App 20140225261 - Lee; Ming Han ; et al. | 2014-08-14 |
| Copper Etching Integration Scheme App 20140197538 - Lu; Chih-Wei ; et al. | 2014-07-17 |
| Interconnection wires of semiconductor devices Grant 8,778,794 - Singh , et al. July 15, 2 | 2014-07-15 |
| Aluminum interconnection apparatus Grant 8,772,934 - Yeh , et al. July 8, 2 | 2014-07-08 |
| Interconnection Wires Of Semiconductor Devices App 20140175650 - Singh; Sunil Kumar ; et al. | 2014-06-26 |
| Method of semiconductor integrated circuit fabrication Grant 8,749,060 - Lee , et al. June 10, 2 | 2014-06-10 |
| Copper etch scheme for copper interconnect structure Grant 8,735,278 - Lee , et al. May 27, 2 | 2014-05-27 |
| Method of semiconductor integrated circuit fabrication Grant 8,735,280 - Yeh , et al. May 27, 2 | 2014-05-27 |
| Copper etching integration scheme Grant 8,728,936 - Lu , et al. May 20, 2 | 2014-05-20 |
| Copper Etching Integration Scheme App 20140131872 - Lu; Chih-Wei ; et al. | 2014-05-15 |
| System And Method For Chemical-mechanical Planarization Of A Metal Layer App 20140091477 - Wu; Yung-Hsu ; et al. | 2014-04-03 |
| Method Of Semiconductor Integrated Circuit Fabrication App 20140084469 - Lee; Ming Han ; et al. | 2014-03-27 |
| Integrated Circuit Formed Using Spacer-Like Copper Deposition App 20140084479 - Yao; Hsin-Chieh ; et al. | 2014-03-27 |
| Interconnect Structures Comprising Flexible Buffer Layers App 20140084471 - Peng; Chao-Hsien ; et al. | 2014-03-27 |
| Aluminum Interconnection Apparatus App 20140061913 - Yeh; Ching-Fu ; et al. | 2014-03-06 |
| Method Of Semiconductor Integrated Circuit Fabrication App 20140065818 - Lu; Chih Wei ; et al. | 2014-03-06 |
| Method Of Making A Finfet Device App 20140065782 - Lu; Chih Wei ; et al. | 2014-03-06 |
| Integrated Circuit Interconnects and Methods of Making Same App 20140027908 - Tsai; Cheng-Hsiung ; et al. | 2014-01-30 |
| Novel Copper Etch Scheme for Copper Interconnect Structure App 20140021611 - Lee; Ming Han ; et al. | 2014-01-23 |
| Apparatus and method for low contact resistance carbon nanotube interconnect Grant 8,624,396 - Wu , et al. January 7, 2 | 2014-01-07 |
| Apparatus And Method For Low Contact Resistance Carbon Nanotube Interconnect App 20130334689 - Wu; Hsien-Chang ; et al. | 2013-12-19 |
| Copper Interconnect Structure And Method For Forming The Same App 20130270702 - YU; Chen-Hua ; et al. | 2013-10-17 |
| Low resistance high reliability contact via and metal line structure for semiconductor device Grant 8,106,512 - Lee , et al. January 31, 2 | 2012-01-31 |
| Low resistance high reliability contact via and metal line structure for semiconductor device Grant 8,013,445 - Lee , et al. September 6, 2 | 2011-09-06 |
| Low Resistance High Reliability Contact Via And Metal Line Structure For Semiconductor Device App 20110024908 - Lee; Hsiang-Huan ; et al. | 2011-02-03 |
| Low Resistance High Reliability Contact Via And Metal Line Structure For Semiconductor Device App 20090218693 - Lee; Hsiang-Huan ; et al. | 2009-09-03 |
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