Lee; Dal Hee

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lee; Dal Hee.The latest application filed is for "integrated circuits having cross-couple constructs and semiconductor devices including integrated circuits".

Company Profile

8.18.21

Lee; Dal Hee - Seoul KR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Latch circuit, flip-flop circuit including the same Grant 11,387,817 - Kang , et al. July 12, 2	2022-07-12
Integrated circuits having cross-couple constructs and semiconductor devices including integrated circuits Grant 11,335,673 - Do , et al. May 17, 2	2022-05-17
Integrated Circuits Having Cross-couple Constructs And Semiconductor Devices Including Integrated Circuits App 20220149032 - Do; Jung-Ho ; et al.	2022-05-12
Scan flip-flop and scan test circuit including the same Grant 11,287,474 - Kim , et al. March 29, 2	2022-03-29
Integrated circuit including interconnection and method of fabricating the same, the interconnection including a pattern shaped for mitigating electromigration Grant 11,189,639 - Kim , et al. November 30, 2	2021-11-30
Latch Circuit, Flip-flop Circuit Including The Same App 20210328582 - KANG; Byoung Gon ; et al.	2021-10-21
Integrated circuit including multiple-height cell and method of manufacturing the integrated circuit Grant 11,101,267 - Lim , et al. August 24, 2	2021-08-24
Standard cell for removing routing interference between adjacent pins and device including the same Grant 11,031,385 - Seo , et al. June 8, 2	2021-06-08
Integrated Circuit Including Interconnection And Method Of Fabricating The Same, The Interconnection Including A Pattern Shaped App 20200235126 - KIM; Ha-young ; et al.	2020-07-23
Integrated circuit including interconnection and method of fabricating the same, the interconnection including a pattern shaped and/or a via disposed for mitigating electromigration Grant 10,651,201 - Kim , et al.	2020-05-12
Standard Cell For Removing Routing Interference Between Adjacent Pins And Device Including The Same App 20200126968 - SEO; Jae-Woo ; et al.	2020-04-23
Integrated Circuit Including Multiple-height Cell And Method Of Manufacturing The Integrated Circuit App 20200051977 - Lim; Jin-young ; et al.	2020-02-13
Standard cell for removing routing interference between adjacent pins and device including the same Grant 10,553,574 - Seo , et al. Fe	2020-02-04
Scan Flip-flop And Scan Test Circuit Including The Same App 20190383875 - KIM; HA-YOUNG ; et al.	2019-12-19
Scan flip-flop and scan test circuit including the same Grant 10,429,443 - Kim , et al. October 1, 2	2019-10-01
Integrated Circuits Having Cross-couple Constructs And Semiconductor Devices Including Integrated Circuits App 20190198491 - Do; Jung-Ho ; et al.	2019-06-27
Engineering change order (ECO) cell, layout thereof and integrated circuit including the ECO cell Grant 10,192,860 - Seo , et al. Ja	2019-01-29
Methods of generating integrated circuit layout using standard cell library Grant 10,108,772 - Baek , et al. October 23, 2	2018-10-23
Integrated Circuit Including Interconnection For Mitigating Electromigration And Method Of Fabricating The Same App 20180294280 - KIM; Ha-young ; et al.	2018-10-11
Integrated circuit and semiconductor device including the same Grant 9,831,877 - Lee , et al. November 28, 2	2017-11-28
Scan Flip-flop And Scan Test Circuit Including The Same App 20170328954 - KIM; HA-YOUNG ; et al.	2017-11-16
Standard Cell For Removing Routing Interference Between Adjacent Pins And Device Including The Same App 20170294430 - SEO; Jae-Woo ; et al.	2017-10-12
Scan flip-flop and scan test circuit including the same Grant 9,753,086 - Kim , et al. September 5, 2	2017-09-05
Method and program for designing integrated circuit Grant 9,665,678 - Cho , et al. May 30, 2	2017-05-30
Engineering Change Order (eco) Cell, Layout Thereof And Integrated Circuit Including The Eco Cell App 20170116366 - Seo; Jae-woo ; et al.	2017-04-27
Integrated Circuit And Semiconductor Device Including The Same App 20170093401 - LEE; DAL-HEE ; et al.	2017-03-30
Methods Of Generating Integrated Circuit Layout Using Standard Cell Library App 20170011160 - BAEK; Sang-hoon ; et al.	2017-01-12
Methods of generating integrated circuit layout using standard cell library Grant 9,460,259 - Baek , et al. October 4, 2	2016-10-04
Integrated Circuit And Semiconductor Device Including The Same App 20160285452 - LEE; DAL-HEE ; et al.	2016-09-29
Integrated circuit and semiconductor device including the same Grant 9,379,705 - Lee , et al. June 28, 2	2016-06-28
Scan Flip-flop And Scan Test Circuit Including The Same App 20160097811 - KIM; HA-YOUNG ; et al.	2016-04-07
Methods Of Generating Integrated Circuit Layout Using Standard Cell Library App 20160055285 - BAEK; Sang-hoon ; et al.	2016-02-25
Method And Program For Designing Integrated Circuit App 20160034627 - Cho; Sung-we ; et al.	2016-02-04
Integrated Circuit And Semiconductor Device Including The Same App 20150244366 - LEE; DAL-HEE ; et al.	2015-08-27
Semiconductor device having decoupling capacitors and dummy transistors Grant 8,952,423 - Jeon , et al. February 10, 2	2015-02-10
Semiconductor Device Having Decoupling Capacitors And Dummy Transistors App 20130320405 - JEON; Joong-Won ; et al.	2013-12-05

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