Lederer; Dimitri
Patent Applications and Registrations
Patent applications and USPTO patent grants for Lederer; Dimitri.The latest application filed is for "charge-trapping layers for iii-v semiconductor devices".
- Lederer; Dimitri - Court-Saint-Etienne BE
- Lederer; Dimitri - Ernage BE
- Lederer; Dimitri - RUE CAMILLE CALS 28 B-5030
| Patent | Date |
|---|---|
| Charge-trapping Layers For Iii-v Semiconductor Devices App 20210280703 - Pawlak; Bartlomiej J. ; et al. | 2021-09-09 |
| Process for manufacturing a multilayer structure made from semiconducting materials Grant 7,585,748 - Raskin , et al. September 8, 2 | 2009-09-08 |
| Method of manufacturing a multilayer semiconductor structure with reduced ohmic losses App 20070032040 - Lederer; Dimitri | 2007-02-08 |
| Process for manufacturing a multilayer structure made from semiconducting materials App 20060166451 - Raskin; Jean-Pierre ; et al. | 2006-07-27 |
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