Lau; Hon Shing

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lau; Hon Shing.The latest application filed is for "power reducing logic and non-destructive latch circuits and applications".

Company Profile

0.13.6

Lau; Hon Shing - Dorado Hills CA US
Lau; Hon Shing - Palo Alto CA
Lau; Hon Shing - Folsom CA US
Lau; Hon Shing - El Dorado Hills CA
Lau; Hon-Shing - Hsinchu TW
Lau; Hon Shing - Allentown PA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Power reducing logic and non-destructive latch circuits and applications Grant 9,490,807 - Lau , et al. November 8, 2	2016-11-08
Apparatus having an embedded 3D hybrid integration for optoelectronic interconnects Grant 9,057,853 - Lau , et al. June 16, 2	2015-06-16
Apparatus having thermal-enhanced and cost-effective 3D IC integration structure with through silicon via interposers Grant 8,604,603 - Lau , et al. December 10, 2	2013-12-10
Power reducing logic and non-destructive latch circuits and applications Grant 8,421,502 - Lau , et al. April 16, 2	2013-04-16
Power reducing logic and non-destructive latch circuits and applications Grant 8,305,112 - Lau , et al. November 6, 2	2012-11-06
Power Reducing Logic And Non-destructive Latch Circuits And Applications App 20120223741 - Lau; Hon Shing ; et al.	2012-09-06
Power Reducing Logic And Non-destructive Latch Circuits And Applications App 20100289528 - Lau; Hon Shing ; et al.	2010-11-18
Apparatus Having an Embedded 3D Hybrid Integration for Optoelectronic Interconnects App 20100215314 - Lau; Hon Shing ; et al.	2010-08-26
Apparatus having thermal-enhanced and cost-effective 3D IC integration structure with through silicon via interposers App 20100213600 - Lau; Hon Shing ; et al.	2010-08-26
Execution unit for performing shuffle and other operations Grant 7,761,694 - Abdallah , et al. July 20, 2	2010-07-20
Execution unit for performing shuffle and other operations App 20080215855 - Abdallah; Mohammad ; et al.	2008-09-04
Power reducing logic and non-destructive latch circuits and applications App 20070103201 - Lau; Hon Shing ; et al.	2007-05-10
Power down system for regulated internal voltage supply in DRAM Grant 6,249,473 - Lau , et al. June 19, 2	2001-06-19
Apparatus and method to determine a most significant bit Grant 5,920,493 - Lau July 6, 1	1999-07-06
Left shift overflow detection Grant 5,777,906 - Lau , et al. July 7, 1	1998-07-07

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