Lasserre; Serge
Patent Applications and Registrations
Patent applications and USPTO patent grants for Lasserre; Serge.The latest application filed is for "dynamically changing the semantic of an instruction".
Company Profile
0.49.46
- Lasserre; Serge - Plascassier N/A FR
- Lasserre; Serge - Frejus N/A FR
- Lasserre; Serge - St. Jean de Cannes FR
- Lasserre; Serge - Grasse-Plascassier FR
Patent Activity
| Patent | Date |
|---|---|
| Dirty cache line write back policy based on stack size trend information Grant 8,539,159 - Chauvel , et al. September 17, 2 | 2013-09-17 |
| Multi-processor computing system having a JAVA stack machine and a RISC-based processor Grant 8,429,383 - Chauvel , et al. April 23, 2 | 2013-04-23 |
| Micro-sequence based security model Grant 8,190,861 - Chauvel , et al. May 29, 2 | 2012-05-29 |
| Energy-aware scheduling of application execution Grant 8,032,891 - Chauvel , et al. October 4, 2 | 2011-10-04 |
| Data processing apparatus, system and method Grant 7,941,790 - Cabillic , et al. May 10, 2 | 2011-05-10 |
| Mixed stack-based RISC processor Grant 7,840,782 - Chauvel , et al. November 23, 2 | 2010-11-23 |
| Test and skip processor instruction having at least one register operand Grant 7,840,784 - Chauvel , et al. November 23, 2 | 2010-11-23 |
| Pre-decoding bytecode prefixes selectively incrementing stack machine program counter Grant 7,757,067 - Chauvel , et al. July 13, 2 | 2010-07-13 |
| Data transfer controlled by task attributes Grant 7,712,098 - Chauvel , et al. May 4, 2 | 2010-05-04 |
| Stack register reference control bit in source operand of instruction Grant 7,634,643 - Chauvel , et al. December 15, 2 | 2009-12-15 |
| Embedded garbage collection Grant 7,565,385 - Chauvel , et al. July 21, 2 | 2009-07-21 |
| Memory management of local variables upon a change of context Grant 7,555,611 - Lasserre , et al. June 30, 2 | 2009-06-30 |
| Unified memory management system for multi processor heterogeneous architecture Grant 7,509,391 - Chauvel , et al. March 24, 2 | 2009-03-24 |
| Accessing device driver memory in programming language representation Grant 7,496,930 - Chauvel , et al. February 24, 2 | 2009-02-24 |
| Memory allocation in a multi-processor system Grant 7,434,021 - Chauvel , et al. October 7, 2 | 2008-10-07 |
| Inter-processor control Grant 7,434,029 - Chauvel , et al. October 7, 2 | 2008-10-07 |
| Smart cache Grant 7,386,671 - Chauvel , et al. June 10, 2 | 2008-06-10 |
| Using IMPDEP2 for system commands related to Java accelerator hardware Grant 7,360,060 - Chauvel , et al. April 15, 2 | 2008-04-15 |
| Management of stack-based memory usage in a processor Grant 7,330,937 - Chauvel , et al. February 12, 2 | 2008-02-12 |
| Synchronizing stack storage Grant 7,162,586 - Chauvel , et al. January 9, 2 | 2007-01-09 |
| Processor with a split stack Grant 7,058,765 - Chauvel , et al. June 6, 2 | 2006-06-06 |
| Cache coherency in a multi-processor system Grant 6,996,683 - Chauvel , et al. February 7, 2 | 2006-02-07 |
| Local memory with indicator bits to support concurrent DMA and CPU access Grant 6,968,400 - Lasserre November 22, 2 | 2005-11-22 |
| Traffic controller using priority and burst control for reducing access latency Grant 6,934,820 - Chauvel , et al. August 23, 2 | 2005-08-23 |
| Dynamically changing the semantic of an instruction App 20050033945 - Chauvel, Gerard ; et al. | 2005-02-10 |
| Fault management and recovery based on task-ID Grant 6,851,072 - Lasserre , et al. February 1, 2 | 2005-02-01 |
| Memory allocation in a multi-processor system App 20040268076 - Chauvel, Gerard ; et al. | 2004-12-30 |
| Embedded garbage collection App 20040260732 - Chauvel, Gerard ; et al. | 2004-12-23 |
| Accessing device driver memory in programming language representation App 20040261085 - Chauvel, Gerard ; et al. | 2004-12-23 |
| Unresolved instruction resolution App 20040260911 - Chauvel, Gerard ; et al. | 2004-12-23 |
| Management of stack-based memory usage in a processor App 20040260904 - Chauvel, Gerard ; et al. | 2004-12-23 |
| Smart cache App 20040260881 - Chauvel, Gerard ; et al. | 2004-12-23 |
| Smart cache Grant 6,826,652 - Chauvel , et al. November 30, 2 | 2004-11-30 |
| Cache with multiple fill modes Grant 6,792,508 - Chauvel , et al. September 14, 2 | 2004-09-14 |
| Cache and DMA with a global valid bit Grant 6,789,172 - Chauvel , et al. September 7, 2 | 2004-09-07 |
| Test and skip processor instruction having at least one register operand App 20040153885 - Chauvel, Gerard ; et al. | 2004-08-05 |
| Interruptible an re-entrant cache clean range instruction Grant 6,772,326 - Chauvel , et al. August 3, 2 | 2004-08-03 |
| Fast hardware looping mechanism for cache cleaning and flushing of cache entries corresponding to a qualifier field Grant 6,766,421 - Lasserre , et al. July 20, 2 | 2004-07-20 |
| MMU descriptor having big/little endian bit to control the transfer data between devices Grant 6,760,829 - Lasserre , et al. July 6, 2 | 2004-07-06 |
| Cache with DMA and dirty bits Grant 6,754,781 - Chauvel , et al. June 22, 2 | 2004-06-22 |
| Multiple microprocessors with a shared cache Grant 6,751,706 - Chauvel , et al. June 15, 2 | 2004-06-15 |
| Level 2 smartcache architecture supporting simultaneous multiprocessor accesses Grant 6,745,293 - Lasserre , et al. June 1, 2 | 2004-06-01 |
| Master/slave processing system with shared translation lookaside buffer Grant 6,742,104 - Chauvel , et al. May 25, 2 | 2004-05-25 |
| Processing system with shared translation lookaside buffer Grant 6,742,103 - Chauvel , et al. May 25, 2 | 2004-05-25 |
| Inter-processor control App 20040088524 - Chauvel, Gerard ; et al. | 2004-05-06 |
| Cache operation based on range of addresses Grant 6,728,838 - Chauvel , et al. April 27, 2 | 2004-04-27 |
| Multi-processor computing system having a JAVA stack machine and a RISC-based processor App 20040078550 - Chauvel, Gerard ; et al. | 2004-04-22 |
| Processor with a split stack App 20040078557 - Chauvel, Gerard ; et al. | 2004-04-22 |
| Synchronizing stack storage App 20040078531 - Chauvel, Gerard ; et al. | 2004-04-22 |
| Program counter adjustment based on the detection of an instruction prefix App 20040078552 - Chauvel, Gerard ; et al. | 2004-04-22 |
| Cache coherency in a multi-processor system App 20040078528 - Chauvel, Gerard ; et al. | 2004-04-22 |
| Memory management of local variables upon a change of context App 20040078522 - Lasserre, Serge ; et al. | 2004-04-22 |
| Cache with block prefetch and DMA Grant 6,697,916 - Lasserre , et al. February 24, 2 | 2004-02-24 |
| Mixed stack-based RISC processor App 20040024989 - Chauvel, Gerard ; et al. | 2004-02-05 |
| Methods and apparatuses for managing memory App 20040024970 - Chauvel, Gerard ; et al. | 2004-02-05 |
| Using IMPDEP2 for system commands related to Java accelator hardware App 20040024991 - Chauvel, Gerard ; et al. | 2004-02-05 |
| Test with immediate and skip processor instruction App 20040024997 - Chauvel, Gerard ; et al. | 2004-02-05 |
| Methods and apparatuses for managing memory App 20040024969 - Chauvel, Gerard ; et al. | 2004-02-05 |
| Synchronization of processor states App 20040024988 - Chauvel, Gerard ; et al. | 2004-02-05 |
| Micro-sequence execution in a processor App 20040024999 - Chauvel, Gerard ; et al. | 2004-02-05 |
| Write back policy for memory App 20040024792 - Chauvel, Gerard ; et al. | 2004-02-05 |
| Processor that accommodates multiple instruction sets and multiple decode modes App 20040024990 - Chauvel, Gerard ; et al. | 2004-02-05 |
| Task based priority arbitration Grant 6,684,280 - Chauvel , et al. January 27, 2 | 2004-01-27 |
| Software controlled cache configuration based on average miss rate Grant 6,681,297 - Chauvel , et al. January 20, 2 | 2004-01-20 |
| Application execution profiling in conjunction with a virtual machine App 20040010785 - Chauvel, Gerard ; et al. | 2004-01-15 |
| Cache/smartcache with interruptible block prefetch Grant 6,678,797 - Chauvel , et al. January 13, 2 | 2004-01-13 |
| Energy-aware scheduling of application execution App 20030217090 - Chauvel, Gerard ; et al. | 2003-11-20 |
| Optimized hardware cleaning function for VIVT data cache Grant 6,606,687 - Chauvel , et al. August 12, 2 | 2003-08-12 |
| Interruptible and re-entrant cache clean range instruction App 20030097550 - Chauvel, Gerard ; et al. | 2003-05-22 |
| Data transfer controlled by task attributes App 20030097394 - Chauvel, Gerard ; et al. | 2003-05-22 |
| Data processing apparatus, system and method App 20030079213 - Cabillic, Gilbert ; et al. | 2003-04-24 |
| Traffic controller using priority and burst control for reducing access latency App 20020194441 - Chauvel, Gerard ; et al. | 2002-12-19 |
| Task based priority arbitration App 20020083251 - Chauvel, Gerard ; et al. | 2002-06-27 |
| Traffic controller using priority and burst control for reducing access latency Grant 6,412,048 - Chauvel , et al. June 25, 2 | 2002-06-25 |
| Digital Signal Processor With Direct And Virtual Addressing App 20020078319 - CHAUVEL, GERARD ; et al. | 2002-06-20 |
| Local memory with indicator bits to support concurrent DMA and CPU access App 20020078268 - Lasserre, Serge | 2002-06-20 |
| Multiple microprocessors with a shared cache App 20020073282 - Chauvel, Gerard ; et al. | 2002-06-13 |
| MMU descriptor having big/little endian bit to control the transfer data between devices App 20020069339 - Lasserre, Serge ; et al. | 2002-06-06 |
| Cache with DMA and dirty bits App 20020069330 - Chauvel, Gerard ; et al. | 2002-06-06 |
| Cache operation based on range of addresses App 20020069331 - Chauvel, Gerard ; et al. | 2002-06-06 |
| Cache and DMA with a global valid bit App 20020069332 - Chauvel, Gerard ; et al. | 2002-06-06 |
| Master/slave processing system with shared translation lookaside buffer App 20020065989 - Chauvel, Gerard ; et al. | 2002-05-30 |
| Fast hardware looping mechanism for cache cleaning and flushing of cache entries corresponding to a qualifier field App 20020065980 - Lasserre, Serge ; et al. | 2002-05-30 |
| Cache/smartcache with interruptible block prefetch App 20020065990 - Chauvel, Gerard ; et al. | 2002-05-30 |
| Level 2 smartcache architecture supporting simultaneous multiprocessor accesses App 20020065988 - Lasserre, Serge ; et al. | 2002-05-30 |
| Software controlled cache configuration based on average miss rate App 20020065992 - Chauvel, Gerard ; et al. | 2002-05-30 |
| Cache with block prefetch and DMA App 20020062409 - Lasserre, Serge ; et al. | 2002-05-23 |
| Processing system with shared translation lookaside buffer App 20020062434 - Chauvel, Gerard ; et al. | 2002-05-23 |
| Fault management and recovery based on task-ID App 20020062459 - Lasserre, Serge ; et al. | 2002-05-23 |
| Audio and video decoder circuit and system Grant 6,369,855 - Chauvel , et al. April 9, 2 | 2002-04-09 |
| Computer circuits, systems, and methods using partial cache cleaning Grant 6,321,299 - Chauvel , et al. November 20, 2 | 2001-11-20 |
| Memory control using memory state information for reducing access latency Grant 6,253,297 - Chauvel , et al. June 26, 2 | 2001-06-26 |
| Transport stream packet parser system Grant 6,226,291 - Chauvel , et al. May 1, 2 | 2001-05-01 |
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