Laschek-Enders; Andreas

Patent Applications and Registrations

Patent applications and USPTO patent grants for Laschek-Enders; Andreas.The latest application filed is for "gate driver that drives with a sequence of gate resistances".

Company Profile

1.9.9

Laschek-Enders; Andreas - Bensheim DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Gate driver that drives with a sequence of gate resistances Grant 9,912,331 - Laschek-Enders March 6, 2	2018-03-06
Gate Driver that Drives with a Sequence of Gate Resistances App 20170373682 - Laschek-Enders; Andreas	2017-12-28
Gate driver that drives with a sequence of gate resistances Grant 9,813,055 - Laschek-Enders November 7, 2	2017-11-07
Gate Driver That Drives With A Sequence Of Gate Resistances App 20170288661 - Laschek-Enders; Andreas	2017-10-05
Power semiconductor module with asymmetrical lead spacing Grant 9,210,818 - Zschieschang , et al. December 8, 2	2015-12-08
Module and assembly with dual DC-links for three-level NPC applications Grant 9,129,824 - Laschek-Enders September 8, 2	2015-09-08
Power Semiconductor Module with Asymmetrical Lead Spacing App 20150195928 - Zschieschang; Olaf ; et al.	2015-07-09
Power semiconductor module with asymmetrical lead spacing Grant 9,042,103 - Zschieschang , et al. May 26, 2	2015-05-26
Module and Assembly with Dual DC-Links for Three-Level NPC Applications App 20140342509 - Laschek-Enders; Andreas	2014-11-20
Module and assembly with dual DC-links for three-level NPC applications Grant 8,847,328 - Laschek-Enders September 30, 2	2014-09-30
Module and Assembly with Dual DC-Links for Three-Level NPC Applications App 20140252410 - Laschek-Enders; Andreas	2014-09-11
Power Semiconductor Module with Asymmetrical Lead Spacing App 20130021759 - Zschieschang; Olaf ; et al.	2013-01-24
Arrangement of at least one power semiconductor module and a printed circuit board Grant 7,780,469 - Zschieschang , et al. August 24, 2	2010-08-24
Arrangement Of At Least One Power Semiconductor Module And A Printed Circuit Board App 20080293261 - Zschieschang; Olaf ; et al.	2008-11-27

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