Larik; Joost
Patent Applications and Registrations
Patent applications and USPTO patent grants for Larik; Joost.The latest application filed is for "semiconductor arrangement".
- Larik; Joost - Villach AT
- Larik; Joost - Poing DE
- Larik; Joost - Nurnberg DE
| Patent | Date |
|---|---|
| Semiconductor arrangement Grant 7,498,194 - Bott , et al. March 3, 2 | 2009-03-03 |
| Semiconductor Arrangement App 20070178624 - Bott; Nikolaus ; et al. | 2007-08-02 |
| Semiconductor arrangement Grant 7,233,059 - Bott , et al. June 19, 2 | 2007-06-19 |
| Semiconductor arrangement App 20050012215 - Bott, Nikolaus ; et al. | 2005-01-20 |
| Trench power semiconductor Grant 6,833,584 - Henninger , et al. December 21, 2 | 2004-12-21 |
| Trench MOS transistor Grant 6,720,616 - Hirler , et al. April 13, 2 | 2004-04-13 |
| Trench power semiconductor component App 20020185680 - Henninger, Ralf ; et al. | 2002-12-12 |
| Method for fabricating a trench MOS power transistor App 20020094635 - Hirler, Franz ; et al. | 2002-07-18 |
| Trench MOS transistor App 20020093050 - Hirler, Franz ; et al. | 2002-07-18 |
| Circuit configuration for protecting an electronic circuit against overload Grant 5,027,181 - Larik , et al. June 25, 1 | 1991-06-25 |
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