LAOR; Michael

Patent Applications and Registrations

Patent applications and USPTO patent grants for LAOR; Michael.The latest application filed is for "integrated folded clos architecture".

Company Profile

0.23.8

LAOR; Michael - Zichron Yaakov IL
Laor; Michael - Zichron-Yakov IL
Laor; Michael - Zichron IL
Laor; Michael - Sunnyvale CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Integrated Folded Clos Architecture App 20170111294 - LAOR; Michael ; et al.	2017-04-20
Router and switch architecture Grant 9,363,173 - Laor , et al. June 7, 2	2016-06-07
EO device for processing data signals Grant 9,304,272 - Mesh , et al. April 5, 2	2016-04-05
Eo Device For Processing Data Signals App 20140270627 - MESH; Michael ; et al.	2014-09-18
Pipelined packet switching and queuing architecture Grant 8,665,875 - Epps , et al. March 4, 2	2014-03-04
Programmable matrix processor Grant 8,392,487 - Mesh , et al. March 5, 2	2013-03-05
Pipelined Packet Switching And Queuing Architecture App 20120314707 - Epps; Garry P. ; et al.	2012-12-13
Optical programmable matrix processor Grant 8,325,403 - Mesh , et al. December 4, 2	2012-12-04
Router And Switch Architecture App 20120106562 - Laor; Michael ; et al.	2012-05-03
Pipelined packet switching and queuing architecture Grant 8,018,937 - Epps , et al. September 13, 2	2011-09-13
Hierarchical QoS behavioral model Grant 7,675,926 - Olsen , et al. March 9, 2	2010-03-09
Pipelined packet switching and queuing architecture Grant 7,643,486 - Belz , et al. January 5, 2	2010-01-05
High-speed hardware implementation of RED congestion control algorithm Grant 7,554,907 - Epps , et al. June 30, 2	2009-06-30
Methods and apparatus for processing packets including distributing packets across multiple packet processing engines and gathering the processed packets from the processing engines Grant 7,304,999 - Sukonik , et al. December 4, 2	2007-12-04
Synchronous pipelined switch using serial transmission Grant 7,286,525 - Laor , et al. October 23, 2	2007-10-23
Pipelined packet switching and queuing architecture App 20060050690 - Epps; Garry P. ; et al.	2006-03-09
Pipelined packet switching and queuing architecture App 20060039374 - Belz; David ; et al.	2006-02-23
Pipelined packet switching and queuing architecture Grant 6,980,552 - Belz , et al. December 27, 2	2005-12-27
Pipelined packet switching and queuing architecture Grant 6,977,930 - Epps , et al. December 20, 2	2005-12-20
Hierarchical QoS behavioral model App 20050249220 - Olsen, Robert ; et al.	2005-11-10
Pipelined multiple issue packet switch Grant 6,831,923 - Laor , et al. December 14, 2	2004-12-14
High-speed hardware implementation of red congestion control algorithm Grant 6,813,243 - Epps , et al. November 2, 2	2004-11-02
High-speed hardware implementation of MDRR algorithm over a large number of queues Grant 6,778,546 - Epps , et al. August 17, 2	2004-08-17
Flexible DMA engine for packet header modification Grant 6,731,644 - Epps , et al. May 4, 2	2004-05-04
Flexible engine and data structure for packet header processing Grant 6,721,316 - Epps , et al. April 13, 2	2004-04-13
Methods and apparatus for processing packets including distributing packets across multiple packet processing engines and gathering the processed packets from the processing engines App 20040037322 - Sukonik, Vitaly ; et al.	2004-02-26
Synchronous pipelined switch using serial transmission Grant 6,424,649 - Laor , et al. July 23, 2	2002-07-23
Pipelined multiple issue packet switch Grant 6,147,996 - Laor , et al. November 14, 2	2000-11-14

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