Lanzillo; Nicholas Anthony
Patent Applications and Registrations
Patent applications and USPTO patent grants for Lanzillo; Nicholas Anthony.The latest application filed is for "top via on subtractively etched conductive line".
Company Profile
16.29.48
- Lanzillo; Nicholas Anthony - Wynantskill NY
- Lanzillo; Nicholas Anthony - Troy NY
- Lanzillo; Nicholas Anthony - Wynatskill NY
Patent Activity
| Patent | Date |
|---|---|
| Back-end-of-line interconnect structures with varying aspect ratios Grant 11,444,029 - Bhosale , et al. September 13, 2 | 2022-09-13 |
| Single-mask alternating line deposition Grant 11,437,317 - Anderson , et al. September 6, 2 | 2022-09-06 |
| Barrier removal for conductor in top via integration scheme Grant 11,430,735 - Anderson , et al. August 30, 2 | 2022-08-30 |
| Top Via On Subtractively Etched Conductive Line App 20220223473 - Anderson; Brent ; et al. | 2022-07-14 |
| High Aspect Ratio Vias For Integrated Circuits App 20220199521 - Lanzillo; Nicholas Anthony ; et al. | 2022-06-23 |
| Conductive Lines With Subtractive Cuts App 20220181255 - Anderson; Brent ; et al. | 2022-06-09 |
| Horizontal Rram Device And Architecture Fore Variability Reduction App 20220173313 - Philip; Timothy Mathew ; et al. | 2022-06-02 |
| Interconnects Having Spacers For Improved Top Via Critical Dimension And Overlay Tolerance App 20220157652 - Anderson; Brent A. ; et al. | 2022-05-19 |
| Topological Semi-metal Interconnects App 20220157733 - Chen; Ching-Tzu ; et al. | 2022-05-19 |
| Stepped Top Via For Via Resistance Reduction App 20220130718 - Anderson; Brent Alan ; et al. | 2022-04-28 |
| Skip via connection between metallization levels Grant 11,315,827 - Huang , et al. April 26, 2 | 2022-04-26 |
| Subtractive line with damascene second line type Grant 11,302,575 - Anderson , et al. April 12, 2 | 2022-04-12 |
| Fully Aligned Top Vias App 20220108922 - Lanzillo; Nicholas Anthony ; et al. | 2022-04-07 |
| Interconnects having spacers for improved top via critical dimension and overlay tolerance Grant 11,295,978 - Anderson , et al. April 5, 2 | 2022-04-05 |
| Top vias with selectively retained etch stops Grant 11,289,371 - Anderson , et al. March 29, 2 | 2022-03-29 |
| Conductive lines with subtractive cuts Grant 11,276,639 - Anderson , et al. March 15, 2 | 2022-03-15 |
| Interconnects having a via-to-line spacer for preventing short circuit events between a conductive via and an adjacent line Grant 11,244,859 - Motoyama , et al. February 8, 2 | 2022-02-08 |
| Subtractive Line with Damascene Second Line Type App 20220037205 - Anderson; Brent ; et al. | 2022-02-03 |
| Top Via Stack App 20220028783 - Anderson; Brent Alan ; et al. | 2022-01-27 |
| Removal Of Barrier And Liner Layers From A Bottom Of A Via App 20220028738 - Park; Chanro ; et al. | 2022-01-27 |
| Top Via Interconnect Having A Line With A Reduced Bottom Dimension App 20220028785 - Anderson; Brent ; et al. | 2022-01-27 |
| Stepped top via for via resistance reduction Grant 11,232,977 - Anderson , et al. January 25, 2 | 2022-01-25 |
| Interconnect Structures with Selective Barrier for BEOL Applications App 20220020638 - Bhosale; Prasad ; et al. | 2022-01-20 |
| Trapezoidal Interconnect at Tight BEOL Pitch App 20220013406 - Lanzillo; Nicholas Anthony ; et al. | 2022-01-13 |
| Top Via With Damascene Line And Via App 20220005732 - Clevenger; Lawrence A. ; et al. | 2022-01-06 |
| Etch Stop Layer Removal For Capacitance Reduction In Damascene Top Via Integration App 20220005731 - Penny; Christopher J. ; et al. | 2022-01-06 |
| Top Via With Next Level Line Selective Growth App 20220005761 - Anderson; Brent ; et al. | 2022-01-06 |
| Fully aligned top vias Grant 11,217,481 - Lanzillo , et al. January 4, 2 | 2022-01-04 |
| Well-controlled Edge-to-edge Spacing Between Adjacent Interconnects App 20210384123 - Anderson; Brent ; et al. | 2021-12-09 |
| Encapsulation topography-assisted self-aligned MRAM top contact Grant 11,195,993 - Rizzolo , et al. December 7, 2 | 2021-12-07 |
| Well-controlled edge-to-edge spacing between adjacent interconnects Grant 11,195,795 - Anderson , et al. December 7, 2 | 2021-12-07 |
| Top via stack Grant 11,195,792 - Anderson , et al. December 7, 2 | 2021-12-07 |
| Top via interconnect having a line with a reduced bottom dimension Grant 11,189,568 - Anderson , et al. November 30, 2 | 2021-11-30 |
| Trapezoidal interconnect at tight BEOL pitch Grant 11,177,162 - Lanzillo , et al. November 16, 2 | 2021-11-16 |
| Etch stop layer removal for capacitance reduction in damascene top via integration Grant 11,177,166 - Penny , et al. November 16, 2 | 2021-11-16 |
| Removal of barrier and liner layers from a bottom of a via Grant 11,177,170 - Park , et al. November 16, 2 | 2021-11-16 |
| Top via with next level line selective growth Grant 11,171,084 - Anderson , et al. November 9, 2 | 2021-11-09 |
| Interconnects Having Spacers For Improved Top Via Critical Dimension And Overlay Tolerance App 20210343585 - Anderson; Brent ; et al. | 2021-11-04 |
| Barrier-less Prefilled Via Formation App 20210343589 - Lanzillo; Nicholas Anthony ; et al. | 2021-11-04 |
| Top Via Interconnect Having A Line With A Reduced Bottom Dimension App 20210343643 - Anderson; Brent ; et al. | 2021-11-04 |
| Top via with damascene line and via Grant 11,164,777 - Clevenger , et al. November 2, 2 | 2021-11-02 |
| Top vias with subtractive line formation Grant 11,158,537 - Anderson , et al. October 26, 2 | 2021-10-26 |
| Etch Stop Layer Removal For Capacitance Reduction In Damascene Top Via Integration App 20210327751 - Penny; Christopher J. ; et al. | 2021-10-21 |
| Hybrid selective dielectric deposition for aligned via integration Grant 11,152,299 - Lanzillo , et al. October 19, 2 | 2021-10-19 |
| Barrier-less prefilled via formation Grant 11,152,257 - Lanzillo , et al. October 19, 2 | 2021-10-19 |
| Top Via With Next Level Line Selective Growth App 20210313265 - Anderson; Brent ; et al. | 2021-10-07 |
| Top via with hybrid metallization Grant 11,139,201 - Motoyama , et al. October 5, 2 | 2021-10-05 |
| Top Via On Subtractively Etched Conductive Line App 20210296171 - Anderson; Brent ; et al. | 2021-09-23 |
| Hybrid Selective Dielectric Deposition For Aligned Via Integration App 20210280510 - Lanzillo; Nicholas Anthony ; et al. | 2021-09-09 |
| Skip Via Connection Between Metallization Levels App 20210280456 - Huang; Huai ; et al. | 2021-09-09 |
| Self-aligned Block Via Patterning For Dual Damascene Double Patterned Metal Lines App 20210280457 - Philip; Timothy Mathew ; et al. | 2021-09-09 |
| Back-end-of-line Interconnect Structures With Varying Aspect Ratios App 20210265277 - Bhosale; Prasad ; et al. | 2021-08-26 |
| Barrier Removal For Conductor In Top Via Integration Scheme App 20210257308 - Anderson; Brent Alan ; et al. | 2021-08-19 |
| Stepped Top Via For Via Resistance Reduction App 20210249302 - Anderson; Brent Alan ; et al. | 2021-08-12 |
| Single-mask Alternating Line Deposition App 20210249351 - Anderson; Brent Alan ; et al. | 2021-08-12 |
| Top Vias With Subtractive Line Formation App 20210233808 - Anderson; Brent ; et al. | 2021-07-29 |
| Top Vias With Selectively Retained Etch Stops App 20210233807 - Anderson; Brent ; et al. | 2021-07-29 |
| Removal Of Barrier And Liner Layers From A Bottom Of A Via App 20210225702 - Park; Chanro ; et al. | 2021-07-22 |
| Barrier-less Prefilled Via Formation App 20210225700 - Lanzillo; Nicholas Anthony ; et al. | 2021-07-22 |
| Conductive Lines With Subtractive Cuts App 20210225761 - Anderson; Brent ; et al. | 2021-07-22 |
| Top Via With Damascene Line And Via App 20210217661 - Clevenger; Lawrence A. ; et al. | 2021-07-15 |
| Top Via Stack App 20210217696 - Anderson; Brent Alan ; et al. | 2021-07-15 |
| Top via interconnects with wrap around liner Grant 11,062,943 - Motoyama , et al. July 13, 2 | 2021-07-13 |
| Fully Aligned Top Vias App 20210143062 - Lanzillo; Nicholas Anthony ; et al. | 2021-05-13 |
| Top Via With Hybrid Metallization App 20210134664 - Motoyama; Koichi ; et al. | 2021-05-06 |
| Interconnects Having A Via-to-line Spacer For Preventing Short Circuit Events Between A Conductive Via And An Adjacent Line App 20210111069 - Motoyama; Koichi ; et al. | 2021-04-15 |
| Interconnect structure having fully aligned vias Grant 10,978,343 - Park , et al. April 13, 2 | 2021-04-13 |
| Trapezoidal Interconnect at Tight BEOL Pitch App 20210082744 - Lanzillo; Nicholas Anthony ; et al. | 2021-03-18 |
| Encapsulation Topography-Assisted Self-Aligned MRAM Top Contact App 20210083179 - Rizzolo; Michael ; et al. | 2021-03-18 |
| Interconnect Structure Having Fully Aligned Vias App 20210050260 - Park; Chanro ; et al. | 2021-02-18 |
| Top Via Interconnects With Wrap Around Liner App 20210043507 - Motoyama; Koichi ; et al. | 2021-02-11 |
| Self-aligned Contact Scheme For Pillar-based Memory Elements App 20210020508 - Briggs; Benjamin D. ; et al. | 2021-01-21 |
| Dielectric surface modification in sub-40nm pitch interconnect patterning Grant 10,886,166 - Lanzillo , et al. January 5, 2 | 2021-01-05 |
| Magnetic tunnel junction performance monitoring based on magnetic field coupling Grant 10,830,841 - Lanzillo , et al. November 10, 2 | 2020-11-10 |
| Dielectric Surface Modification In Sub-40nm Pitch Interconnect Patterning App 20200286776 - Lanzillo; Nicholas Anthony ; et al. | 2020-09-10 |
| Structure and method for forming fully-aligned trench with an up-via integration scheme Grant 10,727,124 - Clevenger , et al. | 2020-07-28 |
| Structure And Method For Forming Fully-aligned Trench With An Up-via Integration Scheme App 20200135560 - Clevenger; Lawrence A. ; et al. | 2020-04-30 |
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