Lanzillo; Nicholas A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lanzillo; Nicholas A..The latest application filed is for "optimizating semiconductor binning by feed-forward process adjustment".

Company Profile

20.18.14

Lanzillo; Nicholas A. - Saratoga Springs NY
Lanzillo; Nicholas A. - Troy NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Hybrid dielectric scheme for varying liner thickness and manganese concentration Grant 11,348,872 - Briggs , et al. May 31, 2	2022-05-31
Semiconductor tool matching and manufacturing management in a blockchain Grant 11,223,655 - Bhosale , et al. January 11, 2	2022-01-11
Optimizating Semiconductor Binning By Feed-forward Process Adjustment App 20210249288 - Briggs; Benjamin D. ; et al.	2021-08-12
Optimizing semiconductor binning by feed-forward process adjustment Grant 11,049,744 - Briggs , et al. June 29, 2	2021-06-29
Hybrid dielectric scheme for varying liner thickness and manganese concentration Grant 10,978,393 - Briggs , et al. April 13, 2	2021-04-13
Interconnect with self-forming wrap-all-around barrier layer Grant 10,978,342 - Huang , et al. April 13, 2	2021-04-13
Magnetic tunnel junction with low series resistance Grant 10,796,833 - Lanzillo , et al. October 6, 2	2020-10-06
Structures and methods for embedded magnetic random access memory (MRAM) fabrication Grant 10,770,511 - Clevenger , et al. Sep	2020-09-08
Accelerated wafer testing using non-destructive and localized stress Grant 10,746,782 - Briggs , et al. A	2020-08-18
Accelerated wafer testing using non-destructive and localized stress Grant 10,739,397 - Briggs , et al. A	2020-08-11
Fully aligned semiconductor device with a skip-level via Grant 10,741,751 - Lanzillo , et al. A	2020-08-11
Interconnect with Self-Forming Wrap-All-Around Barrier Layer App 20200243383 - Huang; Huai ; et al.	2020-07-30
Prevention of switching of spins in magnetic tunnel junctions by on-chip parasitic magnetic shield Grant 10,720,567 - Briggs , et al.	2020-07-21
Fully Aligned Semiconductor Device With A Skip-level Via App 20200136028 - Lanzillo; Nicholas A. ; et al.	2020-04-30
Magnetic Tunnel Junction With Low Series Resistance App 20200098499 - Lanzillo; Nicholas A. ; et al.	2020-03-26
Hybrid Dielectric Scheme For Varying Liner Thickness And Manganese Concentration App 20200091079 - Briggs; Benjamin D. ; et al.	2020-03-19
Semiconductor Tool Matching And Manufacturing Management In A Blockchain App 20200053128 - Bhosale; Prasad ; et al.	2020-02-13
Fully aligned semiconductor device with a skip-level via Grant 10,553,789 - Lanzillo , et al. Fe	2020-02-04
Skip via for metal interconnects Grant 10,319,629 - Yang , et al.	2019-06-11
Structures And Methods For Embedded Magnetic Random Access Memory (mram) Fabrication App 20190165042 - Clevenger; Lawrence A. ; et al.	2019-05-30
Optimizating Semiconductor Binning By Feed-forward Process Adjustment App 20190122911 - Briggs; Benjamin D. ; et al.	2019-04-25
Hybrid dielectric scheme for varying liner thickness and manganese concentration Grant 10,256,191 - Briggs , et al.	2019-04-09
Structures and methods for embedded magnetic random access memory (MRAM) fabrication Grant 10,243,020 - Clevenger , et al.	2019-03-26
Reducing metallic interconnect resistivity through application of mechanical strain Grant 10,211,155 - Briggs , et al. Feb	2019-02-19
Hybrid Dielectric Scheme For Varying Liner Thickness And Manganese Concentration App 20190013278 - Briggs; Benjamin D. ; et al.	2019-01-10
Accelerated Wafer Testing Using Non-destructive And Localized Stress App 20180328979 - Briggs; Benjamin D. ; et al.	2018-11-15
Accelerated Wafer Testing Using Non-destructive And Localized Stress App 20180328977 - Briggs; Benjamin D. ; et al.	2018-11-15
Reducing Metallic Interconnect Resistivity Through Application Of Mechanical Strain App 20180277482 - Briggs; Benjamin D. ; et al.	2018-09-27
Prevention of Switching of Spins in Magnetic Tunnel Junctions by On-Chip Parasitic Magnetic Shield App 20180269383 - Briggs; Benjamin D. ; et al.	2018-09-20
Hybrid Dielectric Scheme For Varying Liner Thickness And Manganese Concentration App 20180211920 - Briggs; Benjamin D. ; et al.	2018-07-26
Prevention of switching of spins in magnetic tunnel junctions by on-chip parasitic magnetic shield Grant 9,985,199 - Briggs , et al. May 29, 2	2018-05-29
Reducing metallic interconnect resistivity through application of mechanical strain Grant 9,941,211 - Briggs , et al. April 10, 2	2018-04-10

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