loadpatents
name:-0.015094995498657
name:-0.0004420280456543
name:-0.005756139755249
Lanka; Narasimha Patent Filings

Lanka; Narasimha

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lanka; Narasimha.The latest application filed is for "clock phase management for die-to-die (d2d) interconnect".

Company Profile
6.1.20
  • Lanka; Narasimha - Dublin CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Clock Phase Management For Die-to-die (d2d) Interconnect
App 20220271912 - Pasdast; Gerald ;   et al.
2022-08-25
Valid Signal For Latency Sensitive Die-to-die (d2d) Interconnects
App 20220261308 - Lanka; Narasimha ;   et al.
2022-08-18
Clock-gating In Die-to-die (d2d) Interconnects
App 20220262756 - Lanka; Narasimha ;   et al.
2022-08-18
Link Initialization Training And Bring Up For Die-to-die Interconnect
App 20220237138 - Lanka; Narasimha ;   et al.
2022-07-28
Sideband Interface For Die-to-die Interconnects
App 20220222198 - Lanka; Narasimha ;   et al.
2022-07-14
Control Apparatus, Device, Method and Computer Program for Determining a Device-Specific Supply Voltage for a Semiconductor Device
App 20220011795 - RIFANI; Michael ;   et al.
2022-01-13
Phy-based Retry Techniques For Die-to-die Interfaces
App 20210344354 - Lanka; Narasimha ;   et al.
2021-11-04
Logic Die In A Multi-chip Package Having A Configurable Physical Interface To On-package Memory
App 20210225827 - LANKA; Narasimha ;   et al.
2021-07-22
Reduction Of Latency Impact Of On-die Error Checking And Correction (ecc)
App 20210224155 - BAINS; Kuljit S. ;   et al.
2021-07-22
Approximate Data Bus Inversion Technique For Latency Sensitive Applications
App 20210004347 - Lanka; Narasimha ;   et al.
2021-01-07
Technology To Provide Accurate Training And Per-bit Deskew Capability For High Bandwidth Memory Input/output Links
App 20200393997 - Lanka; Narasimha ;   et al.
2020-12-17
High Performance Interconnect
App 20200394151 - Wu; Zuoguo ;   et al.
2020-12-17
Link Layer-phy Interface Adapter
App 20200394150 - Lanka; Narasimha ;   et al.
2020-12-17
High performance interconnect
Grant 10,789,201 - Wu , et al. September 29, 2
2020-09-29
Stacked Memory Device With End To End Data Bus Inversion
App 20200251159 - Kind Code
2020-08-06
High Performance Interconnect
App 20180253398 - Wu; Zuoguo ;   et al.
2018-09-06

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