Lane; Richard H.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lane; Richard H..The latest application filed is for "semiconductor structures providing electrical isolation".

Company Profile

0.57.55

Lane; Richard H. - Boise ID
Lane, Richard H - Boise ID
Lane; Richard H. - San Jose CA
Lane; Richard H. - Mesa AZ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor Structures Providing Electrical Isolation App 20150187767 - Grisham; Paul ; et al.	2015-07-02
Methods of providing electrical isolation and semiconductor structures including same Grant 8,987,834 - Grisham , et al. March 24, 2	2015-03-24
Methods Of Providing Electrical Isolation And Semiconductor Structures Including Same App 20120181605 - Grisham; Paul ; et al.	2012-07-19
Methods of providing electrical isolation and semiconductor structures including same Grant 8,148,775 - Gilgen , et al. April 3, 2	2012-04-03
Method of patterning noble metals for semiconductor devices by electropolishing Grant 7,943,477 - Lane May 17, 2	2011-05-17
Semiconductor processing methods Grant 7,935,602 - Wang , et al. May 3, 2	2011-05-03
Methods Of Providing Electrical Isolation And Semiconductor Structures Including Same App 20100133609 - Gilgen; Brent D. ; et al.	2010-06-03
Method Of Patterning Noble Metals For Semiconductor Devices By Electropolishing App 20100055863 - Lane; Richard H.	2010-03-04
Electropolished patterned metal layer for semiconductor devices Grant 7,629,630 - Lane December 8, 2	2009-12-08
Methods Of Providing Electrical Isolation And Semiconductor Structures Including Same App 20090294840 - Gilgen; Brent D. ; et al.	2009-12-03
Reverse metal process for creating a metal silicide transistor gate structure Grant 7,601,598 - Juengling , et al. October 13, 2	2009-10-13
Method and structure for a self-aligned silicided word line and polysilicon plug during the formation of a semiconductor device Grant 7,501,672 - Fishburn , et al. March 10, 2	2009-03-10
Method for forming controlled geometry hardmasks including subresolution elements Grant 7,473,644 - Lane , et al. January 6, 2	2009-01-06
Methods of electrochemically treating semiconductor substrates Grant 7,375,014 - Collins , et al. May 20, 2	2008-05-20
Methods of forming capacitor constructions Grant 7,348,234 - Collins , et al. March 25, 2	2008-03-25
Method of electroplating a substance over a semiconductor substrate Grant 7,344,977 - Collins , et al. March 18, 2	2008-03-18
Reverse metal process for creating a metal silicide transistor gate structure App 20080038893 - Juengling; Warner ; et al.	2008-02-14
Ion implanting methods Grant 7,329,618 - Culver , et al. February 12, 2	2008-02-12
Reverse metal process for creating a metal silicide transistor gate structure Grant 7,288,817 - Juengling , et al. October 30, 2	2007-10-30
Methods of electrochemically treating semiconductor substrates Grant 7,282,131 - Collins , et al. October 16, 2	2007-10-16
Method of electroplating a substance over a semiconductor substrate Grant 7,273,778 - Collins , et al. September 25, 2	2007-09-25
Method and structure for a self-aligned silicided word line and polysilicon plug during the formation of a semiconductor device App 20070164350 - Fishburn; Frederick D. ; et al.	2007-07-19
Semiconductor constructions App 20070117347 - Wang; Hongmei ; et al.	2007-05-24
Method of forming a mass over a semiconductor substrate Grant 7,179,361 - Collins , et al. February 20, 2	2007-02-20
Method of forming a metal-containing layer over selected regions of a semiconductor substrate Grant 7,179,716 - Collins , et al. February 20, 2	2007-02-20
Controlled geometry hardmask including subresolution elements App 20070020939 - Lane; Richard H. ; et al.	2007-01-25
Capacitor with noble metal pattern Grant 7,157,761 - Lane January 2, 2	2007-01-02
Semiconductor processing methods, and semiconductor constructions App 20060292787 - Wang; Hongmei ; et al.	2006-12-28
Ion implanting methods App 20060292838 - Culver; Randall ; et al.	2006-12-28
A method of forming semiconductor structures App 20060234469 - Dickerson; David L. ; et al.	2006-10-19
Double blanket ion implant method and structure Grant 7,119,397 - Fischer , et al. October 10, 2	2006-10-10
Method and structure for a self-aligned silicided word line and polysilicon plug during the formation of a semiconductor device Grant 7,119,024 - Fishburn , et al. October 10, 2	2006-10-10
Method for forming conductive material in opening and structure regarding same Grant 7,112,508 - Rhodes , et al. September 26, 2	2006-09-26
Transistor gate structure Grant 7,067,880 - Juengling , et al. June 27, 2	2006-06-27
Methods of forming capacitor constructions Grant 6,984,301 - Collins , et al. January 10, 2	2006-01-10
Method for forming controlled geometry hardmasks including subresolution elements and resulting structures App 20060003182 - Lane; Richard H. ; et al.	2006-01-05
Isolation region forming methods Grant 6,967,146 - Dickerson , et al. November 22, 2	2005-11-22
Method for forming conductive material in opening and structure regarding same App 20050186779 - Rhodes, Howard E. ; et al.	2005-08-25
Double blanket ion implant method and structure App 20050181567 - Fischer, Mark ; et al.	2005-08-18
Methods of electrochemically treating semiconductor substrates App 20050167279 - Collins, Dale W. ; et al.	2005-08-04
Methods of forming capacitor constructions App 20050167278 - Collins, Dale W. ; et al.	2005-08-04
Method of forming a metal-containing layer over selected regions of a semiconductor substrate App 20050167280 - Collins, Dale W. ; et al.	2005-08-04
Method of electroplating a substance over a semiconductor substrate App 20050167277 - Collins, Dale W. ; et al.	2005-08-04
Methods of electrochemically treating semiconductor substrates App 20050139480 - Collins, Dale W. ; et al.	2005-06-30
Method of electroplating a substance over a semiconductor substrate App 20050139481 - Collins, Dale W. ; et al.	2005-06-30
Method of forming a mass over a semiconductor substrate App 20050139479 - Collins, Dale W. ; et al.	2005-06-30
Reverse metal process for creating a metal silicide transistor gate structure App 20050124106 - Juengling, Werner ; et al.	2005-06-09
Field emission device having a covering comprising aluminum nitride Grant 6,894,306 - Kraus , et al. May 17, 2	2005-05-17
Method for forming conductive material in opening and structures regarding same Grant 6,884,692 - Rhodes , et al. April 26, 2	2005-04-26
Method and structure for a self-aligned silicided word line and polysilicon plug during the formation of a semiconductor device App 20050009343 - Fishburn, Fredrick D. ; et al.	2005-01-13
DRAM circuitry having storage capacitors which include capacitor dielectric regions comprising aluminum nitride Grant 6,835,975 - Kraus , et al. December 28, 2	2004-12-28
Isolation region forming methods App 20040241957 - Dickerson, David L. ; et al.	2004-12-02
Reverse metal process for creating a metal silicide transistor gate structure Grant 6,821,855 - Juengling , et al. November 23, 2	2004-11-23
Process for forming metallized contacts to periphery transistors Grant 6,794,238 - Lane , et al. September 21, 2	2004-09-21
Process for forming metalized contacts to periphery transistors Grant 6,784,501 - Lane , et al. August 31, 2	2004-08-31
Methods of forming a field emission device Grant 6,773,980 - Kraus , et al. August 10, 2	2004-08-10
Structures comprising transistor gates Grant 6,770,927 - Cho , et al. August 3, 2	2004-08-03
High-pressure anneal process for integrated circuits Grant 6,737,730 - Lane , et al. May 18, 2	2004-05-18
Reverse metal process for creating a metal silicide transistor gate structure App 20040075150 - Juengling, Werner ; et al.	2004-04-22
Semiconductor construction of a trench Grant 6,710,420 - Dickerson , et al. March 23, 2	2004-03-23
High-pressure anneal process for integrated circuits Grant 6,703,327 - Lane , et al. March 9, 2	2004-03-09
High-pressure anneal process for integrated circuits Grant 6,703,326 - Lane , et al. March 9, 2	2004-03-09
High pressure anneal process for integrated circuits Grant 6,703,325 - Lane , et al. March 9, 2	2004-03-09
Reverse metal process for creating a metal silicide transistor gate structure App 20040043573 - Juengling, Werner ; et al.	2004-03-04
Method for forming conductive material in opening and structures regarding same App 20040043619 - Rhodes, Howard E. ; et al.	2004-03-04
High-pressure anneal process for integrated circuits Grant 6,693,048 - Lane , et al. February 17, 2	2004-02-17
Method of improving static refresh Grant 6,693,014 - Fischer , et al. February 17, 2	2004-02-17
Methods of electrochemically treating semiconductor substrates, and methods of forming capacitor constructions App 20040011653 - Collins, Dale W. ; et al.	2004-01-22
High-pressure anneal process for integrated circuits Grant 6,673,726 - Lane , et al. January 6, 2	2004-01-06
High-pressure anneal process for integrated circuits Grant 6,670,289 - Lane , et al. December 30, 2	2003-12-30
Method of forming noble metal pattern Grant 6,660,620 - Lane December 9, 2	2003-12-09
Semiconductor processing methods Grant 6,653,187 - Lane , et al. November 25, 2	2003-11-25
Process for forming metalized contacts to periphery transistors App 20030183822 - Lane, Richard H. ; et al.	2003-10-02
Semiconductor Processing Methods Of Forming Integrated Circuitry Memory Devices, Methods Of Forming Capacitor Containers, Methods Of Making Electrical Connection To Circuit Nodes And Related Integrated Circuitry Grant 6,611,018 - Lane , et al. August 26, 2	2003-08-26
Methods Of Forming A Field Emission Device App 20030134443 - Kraus, Brenda D. ; et al.	2003-07-17
Process for forming metallized contacts to periphery transistors App 20030087499 - Lane, Richard H. ; et al.	2003-05-08
Semiconductor processing methods App 20030082874 - Lane, Richard H. ; et al.	2003-05-01
Structures comprising transistor gates App 20030073277 - Cho, Chih-Chen ; et al.	2003-04-17
Method of improving static refresh App 20030054603 - Fischer, Mark ; et al.	2003-03-20
Isolation region forming methods App 20030032258 - Dickerson, David L. ; et al.	2003-02-13
Method of forming noble metal pattern App 20030032255 - Lane, Richard H.	2003-02-13
Isolation region forming methods App 20030022459 - Dickerson, David L. ; et al.	2003-01-30
High-pressure anneal process for integrated circuits App 20030003672 - Lane, Richard H. ; et al.	2003-01-02
Structures comprising transistor gates Grant 6,501,114 - Cho , et al. December 31, 2	2002-12-31
Field emission device App 20020192898 - Kraus, Brenda D. ; et al.	2002-12-19
Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry App 20020192903 - Lane, Richard H. ; et al.	2002-12-19
Method of forming noble metal pattern Grant 6,475,911 - Lane November 5, 2	2002-11-05
High-pressure anneal process for integrated circuits App 20020151128 - Lane, Richard H. ; et al.	2002-10-17
Method of patterning noble metals for semiconductor devices by electropolishing Grant 6,455,370 - Lane September 24, 2	2002-09-24
High-pressure anneal process for integrated circuits App 20020127885 - Lane, Richard H. ; et al.	2002-09-12
Method of forming noble metal pattern App 20020115231 - Lane, Richard H.	2002-08-22
High-pressure anneal process for integrated circuits App 20020098715 - Lane, Richard H. ; et al.	2002-07-25
Isolating region forming methods App 20020089034 - Dickerson, David L. ; et al.	2002-07-11
Isolation region forming methods App 20020070422 - Dickerson, David L. ; et al.	2002-06-13
DRAM circuitry, method of forming a field emission device, and field emission device App 20020068448 - Kraus, Brenda D. ; et al.	2002-06-06
Method of patterning noble metals for semiconductor devices by electropolishing App 20020048870 - Lane, Richard H.	2002-04-25
Method of forming a capacitor container electrode and method of patterning a metal layer by selectively silicizing the electrode or metal layer and removing the silicized portion Grant 6,372,574 - Lane , et al. April 16, 2	2002-04-16
Structures comprising transistor gates App 20020025644 - Cho, Chih-Chen ; et al.	2002-02-28
Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry App 20010036701 - Lane, Richard H. ; et al.	2001-11-01
Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry App 20010036698 - Lane, Richard H. ; et al.	2001-11-01
Structure for improving static refresh and its method of manufacture App 20010023948 - Fischer, Mark ; et al.	2001-09-27
Isolation Region forming methods App 20010012676 - Dickerson, David L ; et al.	2001-08-09
Isolation region forming methods App 20010009798 - Dickerson, David L. ; et al.	2001-07-26
Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry Grant 6,175,146 - Lane , et al. January 16, 2	2001-01-16
Methods and apparatuses for removing material from discrete areas on a semiconductor wafer Grant 6,153,532 - Dow , et al. November 28, 2	2000-11-28
Method for fabricating conductive components in microelectronic devices and substrate structures thereof Grant 6,080,655 - Givens , et al. June 27, 2	2000-06-27
Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry Grant 5,998,257 - Lane , et al. December 7, 1	1999-12-07
Increased interior volume for integrated memory cell Grant 5,760,434 - Zahurak , et al. June 2, 1	1998-06-02
Protection device utilizing one or more subsurface diodes and associated method of manufacture Grant 4,736,271 - Mack , et al. April 5, 1	1988-04-05
Self-aligned buried channel fabrication process Grant 4,381,956 - Lane May 3, 1	1983-05-03
Expandable 4 .times. 8 array multiplier Grant 4,130,878 - Balph , et al. December 19, 1	1978-12-19

Company Registrations

NCAGE Code	51VK7	LANE, RICHARD H
NCAGE Code	62YT8	LANE RICHARD H!DBA RICKS YARD SERVICE
CAGE Code	62YT8	LANE, RICHARD H RICK'S YARD SERVICE
CAGE Code	51VK7	LANE, RICHARD H
DUNS	626664648	LANE, RICHARD H
DUNS	805289766	LANE, RICHARD H

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