loadpatents
name:-0.0076348781585693
name:-0.0074660778045654
name:-0.0012531280517578
Laine; Eric H. Patent Filings

Laine; Eric H.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Laine; Eric H..The latest application filed is for "interconnection for flip-chip using lead-free solders and having improved reaction barrier layers".

Company Profile
0.5.2
  • Laine; Eric H. - Binghamton NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Interconnections for flip-chip using lead-free solders and having improved reaction barrier layers
Grant 8,314,500 - Belanger , et al. November 20, 2
2012-11-20
Interconnection for flip-chip using lead-free solders and having improved reaction barrier layers
Grant 7,932,169 - Belanger , et al. April 26, 2
2011-04-26
Interconnection for flip-chip using lead-free solders and having improved reaction barrier layers
App 20100062597 - Belanger; Luc ;   et al.
2010-03-11
Interconnections For Flip-chip Using Lead-free Solders And Having Improved Reaction Barrier Layers
App 20080157395 - Belanger; Luc ;   et al.
2008-07-03
Process of producing plastic pin grid array
Grant 6,438,830 - Dibble , et al. August 27, 2
2002-08-27
Pin attach structure for an electronic package
Grant 5,952,716 - Dibble , et al. September 14, 1
1999-09-14
Electronic package
Grant 5,616,958 - Laine , et al. April 1, 1
1997-04-01

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