| Patent | Date |
|---|
Variable Width Nano-sheet Field-effect Transistor Cell Structure
App 20220292244 - Lai; Wei-An ; et al. | 2022-09-15 |
Variable width nano-sheet field-effect transistor cell structure
Grant 11,429,774 - Lai , et al. August 30, 2 | 2022-08-30 |
Deep Lines And Shallow Lines In Signal Conducting Paths
App 20220262719 - LAI; Wei-An ; et al. | 2022-08-18 |
Backside Conducting Lines In Integrated Circuits
App 20220254770 - LAI; Wei-An ; et al. | 2022-08-11 |
Semiconductor device including cell region having more similar cell densities in different height rows, and method and system for generating layout diagram of same
Grant 11,409,937 - Lin , et al. August 9, 2 | 2022-08-09 |
Semiconductor Devices And Methods Of Manufacturing Thereof
App 20220238679 - Chiu; Te-Hsin ; et al. | 2022-07-28 |
Semiconductor Devices And Methods Of Manufacturing Thereof
App 20220238371 - Chiu; Te-Hsin ; et al. | 2022-07-28 |
Layout designs of integrated circuits having backside routing tracks
Grant 11,355,487 - Lai , et al. June 7, 2 | 2022-06-07 |
Backside Signal Interconnection
App 20220130759 - Huang; Yu-Xuan ; et al. | 2022-04-28 |
Memory Device And Layout, Manufacturing Method Of The Same
App 20220122993 - Chiu; Te-Hsin ; et al. | 2022-04-21 |
Semiconductor Device And Manufacturing Method Thereof
App 20220068791 - CHIU; Te-Hsin ; et al. | 2022-03-03 |
Layout Designs Of Integrated Circuits Having Backside Routing Tracks
App 20220020738 - LAI; Wei-An ; et al. | 2022-01-20 |
Integrated Circuit, System And Method Of Forming The Same
App 20210343744 - CHIU; Te-Hsin ; et al. | 2021-11-04 |
Semiconductor Devices
App 20210313263 - LAI; WEI-AN ; et al. | 2021-10-07 |
Hybrid power rail structure
Grant 11,133,254 - Lai , et al. September 28, 2 | 2021-09-28 |
Local Interconnect Structure
App 20210280607 - CHEN; Chih-Liang ; et al. | 2021-09-09 |
Multiple Fin Height Integrated Circuit
App 20210217744 - LIN; Wei-Cheng ; et al. | 2021-07-15 |
Local interconnect structure
Grant 11,018,157 - Chen , et al. May 25, 2 | 2021-05-25 |
Semiconductor Device Including Cell Region Having More Similar Cell Densities In Different Height Rows, And Method And System For Generating Layout Diagram Of Same
App 20210110094 - LIN; Wei-Cheng ; et al. | 2021-04-15 |
Multiple fin height integrated circuit
Grant 10,964,684 - Lin , et al. March 30, 2 | 2021-03-30 |
Hybrid Fin Field-Effect Transistor Cell Structures and Related Methods
App 20210005633 - Lai; Wei-An ; et al. | 2021-01-07 |
Hybrid Fin Field-Effect Transistor Cell Structures and Related Methods
App 20210005634 - Lai; Wei-An ; et al. | 2021-01-07 |
Semiconductor device including cell region having more similar cell densities in different height rows, and method and system for generating layout diagram of same
Grant 10,878,158 - Lin , et al. December 29, 2 | 2020-12-29 |
Hybrid fin field-effect transistor cell structures and related methods
Grant 10,797,078 - Lai , et al. October 6, 2 | 2020-10-06 |
Hybrid Power Rail Structure
App 20200105671 - LAI; Wei-An ; et al. | 2020-04-02 |
Hybrid Fin Field-Effect Transistor Cell Structures and Related Methods
App 20200058681 - Lai; Wei-An ; et al. | 2020-02-20 |
Semiconductor Device Including Cell Region Having Mor Similar Cell Densities In Different Height Rows, And Method And System For
App 20200019667 - LIN; Wei-Cheng ; et al. | 2020-01-16 |
Multiple Fin Height Integrated Circuit
App 20200006318 - LIN; Wei-Cheng ; et al. | 2020-01-02 |
Local Interconnect Structure
App 20190096909 - Chen; Chih-Liang ; et al. | 2019-03-28 |
Memory utilizing bundle-level status values and bundle status circuits
Grant 9,478,314 - Lu , et al. October 25, 2 | 2016-10-25 |
Memory Utilizing Bundle-level Status Values And Bundle Status Circuits
App 20160077153 - LU; HUNGWEI ; et al. | 2016-03-17 |
| 