Lai; Ming-Hong

Patent Applications and Registrations

Patent applications and USPTO patent grants for Lai; Ming-Hong.The latest application filed is for "method of estimating the signal delay in a vlsi circuit".

Company Profile

0.8.10

Lai; Ming-Hong - Tao-Yuan TW
Lai; Ming-Hong - Taichung TW
Lai; Ming-Hong - Taichung City TW
Lai; Ming-Hong - Kwei-Shan TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Generalizations of adjoint networks techniques for RLC interconnects model-order reductions Grant 7,797,140 - Lee , et al. September 14, 2	2010-09-14
Method of estimating the signal delay in a VLSI circuit Grant 7,600,206 - Lai , et al. October 6, 2	2009-10-06
Method of determining high-speed VLSI reduced-order interconnect by non-symmetric lanczos algorithm Grant 7,509,243 - Chu , et al. March 24, 2	2009-03-24
Method of estimating the signal delay in a VLSI circuit App 20080250369 - Lai; Ming-Hong ; et al.	2008-10-09
Method of searching paths suffering from the electrostatic discharge in the process of an integrated circuit design Grant 7,398,499 - Lai , et al. July 8, 2	2008-07-08
Method of reducing a multiple-inputs multiple-outputs (MIMO) interconnect circuit system in a global lanczos algorithm App 20080126028 - Chu; Chia-Chi ; et al.	2008-05-29
Method of searching paths suffering from the electrostatic discharge in the process of an integrated circuit design App 20070277138 - Lai; Ming-Hong ; et al.	2007-11-29
Method of developing an analogical VLSI macro model in a global Arnoldi algorithm App 20070255538 - Chu; Chia-Chi ; et al.	2007-11-01
Method of moment computations in R(L)C interconnects of high speed VLSI with resistor loops Grant 7,254,790 - Lee , et al. August 7, 2	2007-08-07
Clock tree synthesis for low power consumption and low clock skew Grant 7,216,322 - Lai , et al. May 8, 2	2007-05-08
Method of determining high-speed VLSI reduced-order interconnect by non-symmetric lanczos algorithm App 20060282799 - Chu; Chia-Chi ; et al.	2006-12-14
Method of estimating crosstalk noise in lumped RLC coupled interconnects Grant 7,124,381 - Lee , et al. October 17, 2	2006-10-17
Generalizations of adjoint networks techniques for RLC interconnects model-order reductions App 20060100831 - Lee; Herng-Jer ; et al.	2006-05-11
Method of verification of estimating crosstalk noise in coupled RLC interconnects with distributed line in nanometer integrated circuits Grant 7,017,130 - Lee , et al. March 21, 2	2006-03-21
Clock tree synthesis for low power consumption and low clock skew App 20060053395 - Lai; Ming-Hong ; et al.	2006-03-09
Method of moment computations in R(L)C interconnects of high speed VLSI with resistor loops App 20060015832 - Lee; Herng-Jer ; et al.	2006-01-19
Method Of Verification Of Estimating Crosstalk Noise In Coupled Rlc Interconnects With Distributed Line In Nanometer Integrated Circuits App 20060010406 - Lee; Herng-Jer ; et al.	2006-01-12
Method of estimating crosstalk noise in lumped RLC coupled interconnects App 20050278668 - Lee, Herng-Jer ; et al.	2005-12-15

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