Lai; Kuan-Liang
Patent Applications and Registrations
Patent applications and USPTO patent grants for Lai; Kuan-Liang.The latest application filed is for "semiconductor device structure with protected bump and method of forming the same".
- Lai; Kuan-Liang - Tainan TW
- LAI; Kuan-Liang - Tainan City TW
| Patent | Date |
|---|---|
| Semiconductor device structure with protected bump and method of forming the same Grant 11,171,100 - Huang , et al. November 9, 2 | 2021-11-09 |
| Semiconductor Device Structure With Protected Bump And Method Of Forming The Same App 20210159197 - HUANG; Hui-Min ; et al. | 2021-05-27 |
| Profile of through via protrusion in 3DIC interconnect Grant 11,004,741 - Wu , et al. May 11, 2 | 2021-05-11 |
| Profile of Through Via Protrusion in 3DIC Interconnect App 20200144119 - Wu; Jiung ; et al. | 2020-05-07 |
| Profile of through via protrusion in 3DIC interconnect Grant 10,566,237 - Wu , et al. Feb | 2020-02-18 |
| Profile of Through Via Protrusion in 3DIC Interconnect App 20190122927 - Wu; Jiung ; et al. | 2019-04-25 |
| Profile of through via protrusion in 3DIC interconnect Grant 10,163,705 - Wu , et al. Dec | 2018-12-25 |
| Profile of Through Via Protrusion in 3DIC Interconnect App 20150311141 - Wu; Jiung ; et al. | 2015-10-29 |
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