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Programmable eraseless memory
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Semiconductor device with minimal short-channel effects and low bit-line resistance
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Operation method for programming and erasing a data in a P-channel sonos memory cell
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Erasing method for p-channel NROM
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Semiconductor device with trench isolation structure
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Semiconductor device with minimal short-channel effects and low bit-line resistance
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Non-volatile memory and fabrication thereof
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Non-volatile memory and fabrication thereof
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Memory structure and method for manufacturing the same
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Non-volatile memory and fabrication thereof
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Semiconductor device with minimal short-channel effects and low bit-line resistance
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Erasing method for p-channel NROM
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Method of fabricating a non-volatile memory with a spacer
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Semiconductor device with trench isolation structure
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Operation method for programming and erasing a data in a P-channel sonos memory cell
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Method For Manufacturing A Metal Oxide Semiconductor With A Sharp Corner Spacer
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Method for forming a metal oxide semiconductor type field effect transistor
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SONOS component having high dielectric property
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Fabrication method for suppressing a hot carrier effect and leakage currents of I/O devices
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Method of manufacturing metal-oxide semiconductor transistor
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Method for forming extension by using double etch spacer
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Process for fabricating CMOS transistor of IC devices employing double spacers for preventing short-channel effects
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