| Patent | Date |
|---|
Interconnect structures of semiconductor devices having a via structure through an upper conductive line
Grant 11,380,581 - Labonte , et al. July 5, 2 | 2022-07-05 |
Method For Manufacturing Optical Device Structures
App 20220050241 - Colak; Levent ; et al. | 2022-02-17 |
Methods of forming variable-depth device structures
Grant 11,112,694 - LaBonte , et al. September 7, 2 | 2021-09-07 |
Gate tie-down enablement with inner spacer
Grant 10,879,375 - Fan , et al. December 29, 2 | 2020-12-29 |
Methods Of Forming Variable-depth Device Structures
App 20200363719 - LABONTE; Andre P. ; et al. | 2020-11-19 |
Interconnect structure having reduced resistance variation and method of forming same
Grant 10,832,944 - LiCausi , et al. November 10, 2 | 2020-11-10 |
Sacrificial gate spacer regions for gate contacts formed over the active region of a transistor
Grant 10,832,961 - Fan , et al. November 10, 2 | 2020-11-10 |
Sacrificial Gate Spacer Regions For Gate Contacts Formed Over The Active Region Of A Transistor
App 20200335401 - Fan; Su Chen ; et al. | 2020-10-22 |
Contact structures
Grant 10,790,376 - Xie , et al. September 29, 2 | 2020-09-29 |
Interconnect Structures Of Semiconductor Devices
App 20200152512 - Labonte; Andre P. ; et al. | 2020-05-14 |
Interconnect Structure Having Reduced Resistance Variation And Method Of Forming Same
App 20200144106 - LiCausi; Nicholas V. ; et al. | 2020-05-07 |
Contact Structures
App 20200058757 - XIE; Ruilong ; et al. | 2020-02-20 |
Gate tie-down enablement with inner spacer
Grant 10,522,654 - Fan , et al. Dec | 2019-12-31 |
Gate Tie-down Enablement With Inner Spacer
App 20190363178 - Fan; Su Chen ; et al. | 2019-11-28 |
Local interconnect structure including non-eroded contact via trenches
Grant 10,388,602 - Fan , et al. A | 2019-08-20 |
Gate tie-down enablement with inner spacer
Grant 10,332,977 - Fan , et al. | 2019-06-25 |
Methods of forming a semiconductor device with a gate contact positioned above the active region
Grant 10,204,994 - Xie , et al. Feb | 2019-02-12 |
Gate Tie-down Enablement With Inner Spacer
App 20180374932 - Fan; Su Chen ; et al. | 2018-12-27 |
Gate tie-down enablement with inner spacer
Grant 10,128,352 - Fan , et al. November 13, 2 | 2018-11-13 |
Methods Of Forming A Semiconductor Device With A Gate Contact Positioned Above The Active Region
App 20180286956 - Xie; Ruilong ; et al. | 2018-10-04 |
Gate Tie-down Enablement With Inner Spacer
App 20180151433 - Fan; Su Chen ; et al. | 2018-05-31 |
Methods of forming a gate contact for a transistor above an active region and the resulting device
Grant 9,947,589 - Park , et al. April 17, 2 | 2018-04-17 |
Gate tie-down enablement with inner spacer
Grant 9,941,163 - Fan , et al. April 10, 2 | 2018-04-10 |
Gate tie-down enablement with inner spacer
Grant 9,929,049 - Fan , et al. March 27, 2 | 2018-03-27 |
Gate tie-down enablement with inner spacer
Grant 9,899,259 - Fan , et al. February 20, 2 | 2018-02-20 |
Gate Tie-down Enablement With Inner Spacer
App 20170372959 - Fan; Su Chen ; et al. | 2017-12-28 |
Gate Tie-down Enablement With Inner Spacer
App 20170278753 - Fan; Su Chen ; et al. | 2017-09-28 |
Gate tie-down enablement with inner spacer
Grant 9,735,054 - Fan , et al. August 15, 2 | 2017-08-15 |
Local Interconnect Structure Including Non-eroded Contact Via Trenches
App 20170170118 - Fan; Su Chen ; et al. | 2017-06-15 |
Gate Tie-down Enablement With Inner Spacer
App 20170170070 - Fan; Su Chen ; et al. | 2017-06-15 |
Gate Tie-down Enablement With Inner Spacer
App 20170162438 - Fan; Su Chen ; et al. | 2017-06-08 |
Self-aligned gate contact formation
Grant 9,640,625 - Bouche , et al. May 2, 2 | 2017-05-02 |
Gate tie-down enablement with inner spacer
Grant 9,627,257 - Fan , et al. April 18, 2 | 2017-04-18 |
Gate Tie-down Enablement With Inner Spacer
App 20170047254 - Fan; Su Chen ; et al. | 2017-02-16 |
Gate Tie-down Enablement With Inner Spacer
App 20170047252 - Fan; Su Chen ; et al. | 2017-02-16 |
Local interconnect structure including non-eroded contact via trenches
Grant 9,570,397 - Fan , et al. February 14, 2 | 2017-02-14 |
Gate tie-down enablement with inner spacer
Grant 9,397,049 - Fan , et al. July 19, 2 | 2016-07-19 |
Self-aligned Gate Contact Formation
App 20150311082 - Bouche; Guillaume ; et al. | 2015-10-29 |
Integrated circuit contact structure and method
Grant 8,580,628 - Labonte , et al. November 12, 2 | 2013-11-12 |
Alignment tolerant semiconductor contact and method
Grant 8,507,375 - Labonte , et al. August 13, 2 | 2013-08-13 |
Alignment Tolerant Semiconductor Contact And Method
App 20130200471 - Labonte; Andre P. ; et al. | 2013-08-08 |
Integrated Circuit Contact Structure And Method
App 20130200441 - Labonte; Andre P. ; et al. | 2013-08-08 |
Non-volatile memory cell with asymmetrical split gate and related system and method
Grant 8,502,296 - Labonte , et al. August 6, 2 | 2013-08-06 |
Methods of Forming a Replacement Gate Electrode With a Reentrant Profile
App 20130178055 - LaBonte; Andre P. ; et al. | 2013-07-11 |
System and method for controlling an etch process for a single crystal having a buried layer
Grant 8,007,675 - Labonte , et al. August 30, 2 | 2011-08-30 |
Apparatus and method for isolating integrated circuit components using deep trench isolation and shallow trench isolation
Grant 7,968,418 - Labonte , et al. June 28, 2 | 2011-06-28 |
Semiconductor Device Having Localized Insulated Block In Bulk Substrate And Related Method
App 20110042778 - Printy; Craig ; et al. | 2011-02-24 |
Semiconductor device having localized insulated block in bulk substrate and related method
Grant 7,829,429 - Printy , et al. November 9, 2 | 2010-11-09 |
System and method for providing a single deposition emitter/base in a bipolar junction transistor
Grant 7,781,295 - Ramdani , et al. August 24, 2 | 2010-08-24 |
| 