| Patent | Date |
|---|
Insulating gate separation structure for transistor devices
Grant 10,879,073 - Park , et al. December 29, 2 | 2020-12-29 |
Self-aligned buried contact for vertical field-effect transistor and method of production thereof
Grant 10,770,585 - Xie , et al. Sep | 2020-09-08 |
Insulating Gate Separation Structure For Transistor Devices
App 20200135473 - Park; Chanro ; et al. | 2020-04-30 |
Self-aligned Buried Contact For Vertical Field-effect Transistor And Method Of Production Thereof
App 20200098913 - XIE; Ruilong ; et al. | 2020-03-26 |
Gate cut method after source/drain metallization
Grant 10,566,201 - Park , et al. Feb | 2020-02-18 |
Contacting source and drain of a transistor device
Grant 10,468,300 - Xie , et al. No | 2019-11-05 |
Middle of the line (MOL) contacts with two-dimensional self-alignment
Grant 10,283,408 - Xie , et al. | 2019-05-07 |
Air-gap gate sidewall spacer and method
Grant 10,249,728 - Chanemougame , et al. | 2019-04-02 |
Gate contact structure positioned above an active region of a transistor device
Grant 10,243,053 - Xie , et al. | 2019-03-26 |
Methods of forming an air gap adjacent a gate of a transistor and a gate contact above the active region of the transistor
Grant 10,211,100 - Xie , et al. Feb | 2019-02-19 |
Contacting Source And Drain Of A Transistor Device
App 20190013241 - Xie; Ruilong ; et al. | 2019-01-10 |
Methods Of Forming An Air Gap Adjacent A Gate Of A Transistor And A Gate Contact Above The Active Region Of The Transistor
App 20180277430 - Xie; Ruilong ; et al. | 2018-09-27 |
Air-gap Gate Sidewall Spacer And Method
App 20180240883 - CHANEMOUGAME; DANIEL ; et al. | 2018-08-23 |
Air-gap Gate Sidewall Spacer And Method
App 20180204927 - CHANEMOUGAME; DANIEL ; et al. | 2018-07-19 |
Air-gap gate sidewall spacer and method
Grant 10,026,824 - Chanemougame , et al. July 17, 2 | 2018-07-17 |
Method and apparatus for placing a gate contact inside a semiconductor active region having high-k dielectric gate caps
Grant 10,014,215 - Labonte , et al. July 3, 2 | 2018-07-03 |
Middle Of The Line (mol) Contacts With Two-dimensional Self-alignment
App 20180182668 - XIE; RUILONG ; et al. | 2018-06-28 |
Method and apparatus for placing a gate contact inside an active region of a semiconductor
Grant 9,941,278 - Labonte , et al. April 10, 2 | 2018-04-10 |
Middle of the line (MOL) contacts with two-dimensional self-alignment
Grant 9,929,048 - Xie , et al. March 27, 2 | 2018-03-27 |
Method And Apparatus For Placing A Gate Contact Inside An Active Region Of A Semiconductor
App 20180012887 - LABONTE; Andre ; et al. | 2018-01-11 |
Method And Apparatus For Placing A Gate Contact Inside A Semiconductor Active Region Having High-k Dielectric Gate Caps
App 20180012798 - LABONTE; Andre ; et al. | 2018-01-11 |
Method and apparatus for placing a gate contact inside a semiconductor active region having high-k dielectric gate caps
Grant 9,824,921 - Labonte , et al. November 21, 2 | 2017-11-21 |
Methods of forming a gate contact above an active region of a semiconductor device
Grant 9,780,178 - Xie , et al. October 3, 2 | 2017-10-03 |
Three-dimensional semiconductor transistor with gate contact in active region
Grant 9,691,897 - Xie , et al. June 27, 2 | 2017-06-27 |
Three-dimensional Semiconductor Transistor With Gate Contact In Active Region
App 20170092764 - XIE; Ruilong ; et al. | 2017-03-30 |
Methods Of Forming A Gate Contact Above An Active Region Of A Semiconductor Device
App 20160359009 - Xie; Ruilong ; et al. | 2016-12-08 |
Methods of forming self-aligned contact structures on semiconductor devices and the resulting devices
Grant 9,502,286 - Xie , et al. November 22, 2 | 2016-11-22 |
Gate Contact Structure Having Gate Contact Layer
App 20160336399 - LABONTE; Andre ; et al. | 2016-11-17 |
Gate contact structure having gate contact layer
Grant 9,490,317 - Labonte , et al. November 8, 2 | 2016-11-08 |
Gate and source/drain contact structures for a semiconductor device
Grant 9,478,662 - Labonte , et al. October 25, 2 | 2016-10-25 |
Self-aligned contacts and methods of fabrication
Grant 9,460,963 - Wells , et al. October 4, 2 | 2016-10-04 |
Methods of forming a combined gate and source/drain contact structure and the resulting device
Grant 9,455,254 - Xie , et al. September 27, 2 | 2016-09-27 |
Gate And Source/drain Contact Structures For A Semiconductor Device
App 20160268415 - Labonte; Andre ; et al. | 2016-09-15 |
Methods Of Forming Self-aligned Contact Structures On Semiconductor Devices And The Resulting Devices
App 20160163585 - Xie; Ruilong ; et al. | 2016-06-09 |
Methods Of Forming A Combined Gate And Source/drain Contact Structure And The Resulting Device
App 20160133623 - Xie; Ruilong ; et al. | 2016-05-12 |
Methods of forming contacts on semiconductor devices and the resulting devices
Grant 9,324,656 - Labonte , et al. April 26, 2 | 2016-04-26 |
Self-aligned Contacts And Methods Of Fabrication
App 20150279738 - Wells; Gabriel Padron ; et al. | 2015-10-01 |
SiGe heterojunction bipolar transistor and method of forming a SiGe heterojunction bipolar transistor
Grant 8,377,788 - Noort , et al. February 19, 2 | 2013-02-19 |
SiGe Heterojunction Bipolar Transistor and Method of Forming a SiGe Heterojunction Bipolar Transistor
App 20120119262 - Noort; Wibo Van ; et al. | 2012-05-17 |
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